| Part Number | MAX9164 |
| Manufacturer | Maxim |
| Title | 3.3V Single LVDS Driver/Receiver |
| Description | The MAX9164 high-speed LVDS driver/receiver is designed specifically for low-power point-to-point applications. The MAX9164 operates from a single... |
| Features |
an independent differential driver and receiver. The MAX9164 driver output uses a current-steering configuration to generate a 3.1mA drive current. The driver accepts a single-ended input and translates it to LVDS signals at speeds up to 200Mbps over controlled-impedance media of approximately 100Ω.... |
| Published | May 2, 2005 |
| Datasheet |
 MAX9164 File
|
| Part Number | MAX9169 |
| Manufacturer | Maxim |
| Title | 4-Port LVDS and LVTTL-to-LVDS Repeaters |
| Description | The MAX9169/MAX9170 low-jitter, low-voltage differential signaling LVDS/LVTTL-to-LVDS repeaters are ideal for applications that require high-speed. |
| Features |
MAX9169/MAX9170
Ordering Information
PART MAX9169ESE MAX9169EUE TEMP RANGE -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PINPACKAGE 16 SO 16 TSSOP 16 SO 16 TSSOP INPUT LVDS LVDS LVTTL LVTTL
Applications
Point-to-Point Baseband Data Transmission Cellular Phone Base Stations Add/Drop . |
| Datasheet |
MAX9169 File
|
| Part Number | MAX9163 |
| Manufacturer | Maxim |
| Title | Bus LVDS 3.3V Single Transceiver |
| Description | The MAX9163 high-speed bus low-voltage differential signaling (BLVDS) transceiver is designed specifically for heavily loaded multipoint bus appli. |
| Features |
a fail-safe circuit that sets the receiver output high when the receiver inputs are undriven and open, terminated, or shorted. The MAX9163 is offered in an 8-lead SO package, and is specified for operation from -40°C to +85°C. o BLVDS Signaling o 3.3V Operation o Low-Power CMOS Design o 200Mbps Data. |
| Datasheet |
MAX9163 File
|
| Part Number | MAX9160 |
| Manufacturer | Maxim |
| Title | LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver |
| Description | The MAX9160 125MHz, 14-port LVTTL/LVCMOS clock driver repeats the selected LVDS or LVTTL/LVCMOS input on two output banks. Each bank consists of s. |
| Features |
o LVDS or LVTTL/LVCMOS Input Selection o LVDS Input Fail-Safe Sets Outputs High for Open, Undriven Short, or Undriven Parallel Termination o Two Output Banks with Separate Bank Enables o Integrated Output Series Termination for 60Ω Lines o 200ps (max) Output-to-Output Skew o ±100ps (max) Peak-to-Pea. |
| Datasheet |
MAX9160 File
|
