| Part Number | M14D5121632A-2.5BG2M |
| Manufacturer | ESMT |
| Title | DDR-II SDRAM |
| Description | ESMT (Preliminary) M14D5121632A (2M) DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ±... |
| Features |
JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation. On-chip DLL Differential clock inputs (CLK and CLK )... |
| Published | Mar 25, 2019 |
| Datasheet |
 M14D5121632A-2.5BG2M File
|
| Part Number | M14D5121632A-2.5BG2A |
| Manufacturer | ESMT |
| Title | DDR-II SDRAM |
| Description | Pin Name A0~A12, BA0,BA1 DQ0~DQ15 RAS CAS WE VSS VDD DQS, DQS (LDQS, LDQS UDQS, UDQS) ODT NC Function Address inputs - Row address A0~A12 - Colu. |
| Features |
JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation. On-chip DLL Differential clock inputs (C. |
| Datasheet |
M14D5121632A-2.5BG2A File
|
