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74LS240 Datasheet PDF

74LS240
National Semiconductor

Part Number 74LS240
Description Octal TRI-STATE Buffers/Line Drivers/Line Receivers
Page 6 Pages
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April 1992
DM54LS240 DM74LS240
DM54LS241 DM74LS241
Octal TRI-STATE Buffers Line Drivers Line Receivers
General Description
These buffers line drivers are designed to improve both the
performance and PC board density of TRI-STATE buffers
drivers employed as memory-address drivers clock drivers
and bus-oriented transmitters receivers Featuring 400 mV
of hysteresis at each low current PNP data line input they
provide improved noise rejection and high fanout outputs
and can be used to drive terminated lines down to 133X
Features
Y TRI-STATE outputs drive bus lines directly
Y PNP inputs reduce DC loading on bus lines
Y Hysteresis at data inputs improves noise margins
Y Typical IOL (sink current)
54LS 12 mA
74LS 24 mA
Y Typical IOH (source current)
54LS b12 mA
74LS b15 mA
Y Typical propagation delay times
Inverting
10 5 ns
Noninverting 12 ns
Y Typical enable disable time 18 ns
Y Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL F 6411 – 1
Order Number DM54LS240J
DM54LS240W DM54LS240E
DM74LS240WM or DM74LS240N
See NS Package Number E20A J20A
M20B N20A or W20A
Function Tables
TL F 6411 – 2
Order Number DM54LS241J
DM54LS241W DM54LS241E
DM74LS241WM or DM74LS241N
See NS Package Number E20A J20A
M20B N20A or W20A
LS240
Inputs
GA
LL
LH
HX
Output
Y
H
L
Z
LS241
Inputs
Outputs
G G 1A 2A 1Y 2Y
XL
L
X
L
XL
H
X
H
XH
X
X
Z
HX
X
L
L
HX
X
H
H
LX
X
X
Z
L e Low Logic Level
H e High Logic Level
X e Either Low or High Logic Level
Z e High Impedance
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 6411
RRD-B30M105 Printed in U S A

















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74LS240 datasheet pdf
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