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74VHC27 Datasheet PDF

74VHC27
Fairchild Semiconductor

Part Number 74VHC27
Description Triple 3-Input NOR Gate
Page 6 Pages
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July 1994
Revised April 1999
74VHC27
Triple 3-Input NOR Gate
General Description
The VHC27 is an advanced high speed CMOS 3-Input
NOR Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 3 stages including buffer
output, which provide high noise immunity and stable out-
put. An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High speed: tPD = 4.1 ns (typ) at TA = 25°C
s Low power dissipation: ICC = 2 µA (max) at TA = 25°C
s High noise immunity: VNIH = VNIL = 28% VCC (min)
s Power down protection is provided on all inputs
s Low noise: VOLP = 0.8V (max)
s Pin and function compatible with 74HC27
Ordering Code:
Order Number Package Number
Package Description
74VHC27M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC27SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC27MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC27N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn, Cn
Yn
Description
Inputs
Outputs
Truth Table
ABCY
HXX L
XHX L
XXHL
L L LH
X = Don't Care
© 1999 Fairchild Semiconductor Corporation DS011682.prf
www.fairchildsemi.com

















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