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74VCX16500 Datasheet PDF

74VCX16500
Fairchild Semiconductor

Part Number 74VCX16500
Description Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs
Page 8 Pages
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March 1998
Revised April 1999
74VCX16500
Low Voltage 18-Bit Universal Bus Transceivers with
3.6V Tolerant Inputs and Outputs
General Description
Features
The VCX16500 is an 18-bit universal bus transceiver which
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
s 1.65V–3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD (A to B, B to A)
2.9 ns max for 3.0V to 3.6V VCC
clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is
HIGH. When LEAB is LOW, the A data is latched if CLKAB
is held at a HIGH or LOW logic level. If LEAB is LOW, the A
3.5 ns max for 2.3V to 2.7V VCC
7.0 ns max for 1.65V to 1.95V VCC
s Power-down high impedance inputs and outputs
bus data is stored in the latch/flip-flop on the HIGH-to-LOW
transition of CLKAB. When OEAB is HIGH, the outputs are
active. When OEAB is LOW, the outputs are in a high-
impedance state.
s Supports live insertion/withdrawal (Note 1)
s Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
Data flow for B to A is similar to that of A to B but uses
±18 mA @ 2.3V VCC
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
±6 mA @ 1.65V VCC
s Uses patented noise/EMI reduction circuitry
The VCX16500 is designed for low voltage (1.65V to 3.6V) s Latchup performance exceeds 300 mA
VCC applications with I/O capability up to 3.6V.
s ESD performance:
www.DataSheet4U.com
The 74VCX16500 is fabricated with an advanced CMOS
Human body model > 2000V
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Machine model >200V
Note 1: To ensure the high-impedance state during power up or power
down, OEBA should be tied to VCC through a pull-up resistor and OEAB
should be tied to GND through a pull-down resistors; the minimum value of
the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74VCX16500MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation DS500089.prf
www.fairchildsemi.com

















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