Z-80A Datasheet PDF - ETC

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Z-80A
ETC

Part Number Z-80A
Description Z80A
Page 30 Pages


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Z80 Family
CPU Peripherals
User Manual
UM008101-0601
www.DataSheet4U.com
ZiLOG Worldwide Headquarters • 910 E. Hamilton Avenue • Campbell, CA 95008
Telephone: 408.558.8500 • Fax: 408.558.8300 • www.ZiLOG.com



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Z80 CPU Peripherals
User Manual
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This publication is subject to replacement by a later edition. To determine whether a later
edition exists, or to request copies of publications, contact:
ZiLOG Worldwide Headquarters
910 E. Hamilton Avenue
Campbell, CA 95008
Telephone: 408.558.8500
Fax: 408.558.8300
www.ZiLOG.com
Windows is a registered trademark of Microsoft Corporation.
Document Disclaimer
©2001 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded.
ZiLOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF
ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS
DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY
INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR
TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Devices sold by ZiLOG, Inc. are covered
by warranty and limitation of liability provisions appearing in the ZiLOG, Inc. Terms and Conditions of
Sale. ZiLOG, Inc. makes no warranty of merchantability or fitness for any purpose Except with the
expwrewssww.rDitteantaapSprhoveael otf4ZUiL.OcGo, muse of information, devices, or technology as critical components
of life support systems is not authorized. No licenses are conveyed, implicitly or otherwise, by this
document under any intellectual property rights.
UM008101-0601
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Z80 CPU Peripherals
User Manual
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iii
Table of Contents
Counter/Timer Channels
CTC Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
CTC General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
CTC Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Structure of Channel Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Interrupt Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
CTC Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
CTC Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
CTC Counter Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
CTC Timer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
CTC Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Loading The Channel Control Register . . . . . . . . . . . . . . . . . . . .19
Loading The Time Constant Register . . . . . . . . . . . . . . . . . . . . . .22
Loading The Interrupt Vector Register . . . . . . . . . . . . . . . . . . . . .22
CTC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
CTC Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
CTC Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
CTC Counting and Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
CTC Interrupt Servicing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
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.29
Daisy-Chain Interrupt Servicing . . . . . . . . . . . . . . . . . . . . . . . . . .30
UM008101-0601
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Z80 CPU Peripherals
User Manual
iv
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Direct Memory Access
DMA Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
CPU Data Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
DMA Data Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
DMA Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
DMA Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Classes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Transfer Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
Address Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Byte Matching (Searching) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
Auto Restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Pulse Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Variable Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Events and Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Internal Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
General Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Control And Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
Address and Byte Counting . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Bus Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89
Write Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91
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.92
.95
Write Register 2 Group . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97
UM008101-0601
Table of Contents



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