XR16M654 Datasheet PDF - Exar

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XR16M654
Exar

Part Number XR16M654
Description 1.62V TO 3.63V QUAD UART
Page 30 Pages


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XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
MAY 2008
REV. 1.0.0
GENERAL DESCRIPTION
The XR16M6541 (M654) is an enhanced quad
Universal Asynchronous Receiver and Transmitter
(UART) each with 64 bytes of transmit and receive
FIFOs, programmable transmit and receive FIFO
trigger levels, automatic hardware and software flow
control, and data rates of up to 16 Mbps at 4X
sampling rate. Each UART has a set of registers that
provide the user with operating status and control,
receiver error indications, and modem serial interface
controls. An internal loopback capability allows
onboard diagnostics. The M654 is available in a 48-
pin QFN, 64-pin LQFP, 68-pin PLCC, 80-pin LQFP
and 100-pin QFP packages. The 64-pin and 80-pin
packages only offer the 16 mode interface, but the
48, 68 and 100 pin packages offer an additional 68
mode interface which allows easy integration with
Motorola processors. The XR16M654IV (64-pin)
offers three state interrupt output while the
XR16M654DIV provides continuous interrupt output.
The 100 pin package provides additional FIFO status
outputs (TXRDY# and RXRDY# A-D), separate
infrared transmit data outputs (IRTX A-D) and
channel C external clock input (CHCCLK). The
XR16M654 is compatible with the industry standard
ST16C554 and ST16C654/654D.
NOTE: 1 Covered by U.S. Patent #5,649,122.
FEATURES
Pin-to-pin compatible with ST16C454, ST16C554,
TI’s TL16C754B and NXP’s SC16C654B
Intel or Motorola Data Bus Interface select
Four independent UART channels
Register Set Compatible to 16C550
Data rates of up to 16 Mbps
64 Byte Transmit FIFO
64 Byte Receive FIFO with error tags
4 Selectable TX and RX FIFO Trigger Levels
Automatic Hardware (RTS/CTS) Flow Control
Automatic Software (Xon/Xoff) Flow Control
Progammable Xon/Xoff characters
Wireless Infrared (IrDA 1.0) Encoder/Decoder
Full modem interface
1.62V to 3.63V supply operation
Sleep Mode with automatic wake-up
Crystal oscillator or external clock input
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FIGURE 1. XR16M654 BLOCK DIAGRAM
A2:A0
D7:D0
IOR#
IOW#
CSA#
CSB#
CSC#
CSD#
INTA
INTB
INTC
INTD
CHCCLK
TXRDY# A-D
RXRDY# A-D
Reset
16/68#
INTSEL
CLKSEL
Data Bus
Interface
UART Channel A
UART
Regs
BRG
64 Byte TX FIFO
TX & RX
IR
ENDEC
64 Byte RX FIFO
UART Channel B
(same as Channel A)
UART Channel C
(same as Channel A)
UART Channel D
(same as Channel A)
Crystal Osc/Buffer
1.62V to 3.6V VCC
GND
TXA, RXA, IRTXA, DTRA#,
DSRA#, RTSA#, CTSA#,
CDA#, RIA#
TXB, RXB, IRTXB, DTRB#,
DSRB#, RTSB#, CTSB#,
CDB#, RIB#
TXC, RXC, IRTXC, DTRC#,
DSRC#, RTSC#, CTSC#,
CDC#, RIC#
TXD, RXD, IRTXD, DTRD#,
DSRD#, RTSD#, CTSD#,
CDD#, RID#
XTAL1
XTAL2
654 BLK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com



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XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
FIGURE 2. PIN OUT ASSIGNMENT FOR 100-PIN QFP PACKAGES IN 16 AND 68 MODE
REV. 1.0.0
TXRDYD# 81
RXRDYD# 82
CDD# 83
RID# 84
RXD 85
VCC 86
INTSEL 87
D0 88
D1 89
D2 90
D3 91
D4 92
D5 93
D6 94
D7 95
GND 96
RXA 97
RIA# 98
CDA# 99
RXRDYA# 100
XR16M654
100-pin QFP
Intel Mode
Connect 16/68# pin to VCC
50 RXRDYC#
49 CDC#
48 RIC#
47 RXC
46 GND
45 TXRDY#
44 RXRDY#
43 RESET
42 CHCCLK
41 XTAL2
40 XTAL1
39 A0
38 A1
37 A2
36 16/68#
35 CLKSEL
34 RXB
33 RIB#
32 CDB#
31 RXRDYB#
TXRDYD# 81
RXRDYD# 82
CDD# 83
RID# 84
RXD 85
VCC 86
INTSEL 87
D0 88
D1 89
D2 90
D3 91
D4 92
D5 93
D6 94
D7 95
GND 96
RXA 97
RIA# 98
CDA# 99
RXRDYA# 100
XR16M654
100-pin QFP
Motorola Mode
Connect 16/68# pin to GND
2
50 RXRDYC#
49 CDC#
48 RIC#
47 RXC
46 GND
45 TXRDY#
44 RXRDY#
43 RESET
42 CHCCLK
41 XTAL2
40 XTAL1
39 A0
38 A1
37 A2
36 16/68#
35 CLKSEL
34 RXB
33 RIB#
32 CDB#
31 RXRDYB#



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XR16M654/654D
REV. 1.0.0
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
FIGURE 3. PIN OUT ASSIGNMENT FOR 68-PIN PLCC PACKAGES IN 16 AND 68 MODE AND 64-PIN LQFP PACKAGES
DSRA# 10
CTSA# 11
DTRA# 12
VCC 13
RTSA# 14
INTA 15
CSA# 16
TXA 17
IOW# 18
TXB 19
CSB# 20
INTB 21
RTSB# 22
GND 23
DTRB# 24
CTSB# 25
DSRB# 26
XR16M654
68-pin PLCC
Intel Mode
(16/68# pin connected to VCC)
60 DSRD#
59 CTSD#
58 DTRD#
57 GND
56 RTSD#
55 INTD
54 CSD#
53 TXD
52 IOR#
51 TXC
50 CSC#
49 INTC
48 RTSC#
47 VCC
46 DTRC#
45 CTSC#
44 DSRC#
DSRA# 10
CTSA# 11
DTRA# 12
VCC 13
RTSA# 14
IRQ# 15
CS# 16
TXA 17
R/W# 18
TXB 19
A3 20
N.C. 21
RTSB# 22
GND 23
DTRB# 24
CTSB# 25
DSRB# 26
XR16M654
68-pin PLCC
Motorola Mode
(16/68# pin connected to GND)
60 DSRD#
59 CTSD#
58 DTRD#
57 GND
56 RTSD#
55 N.C.
54 N.C.
53 TXD
52 N.C.
51 TXC
50 A4
49 N.C.
48 RTSC#
47 VCC
46 DTRC#
45 CTSC#
44 DSRC#
DSRA# 1
CTSA# 2
DTRA# 3
VCC 4
RTSA# 5
INTA 6
CSA# 7
TXA 8
IOW# 9
TXB 10
CSB# 11
INTB 12
RTSB# 13
GND 14
DTRB# 15
CTSB# 16
XR16M654
64-pin TQFP
Intel Mode Only
48 DSRD#
47 CTSD#
46 DTRD#
45 GND
44 RTSD#
43 INTD
42 CSD#
41 TXD
40 IOR#
39 TXC
38 CSC#
37 INTC
36 RTSC#
35 VCC
34 DTRC#
33 CTSC#
3



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XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
FIGURE 4. PIN OUT ASSIGNMENT FOR 48-PIN QFN PACKAGE AND 80-PIN LQFP PACKAGE
REV. 1.0.0
CTSA# 1
VCC 2
RTSA# 3
INTA 4
CSA# 5
TXA 6
IOW# 7
TXB 8
CSB# 9
INTB 10
RTSB# 11
CTSB# 12
XR16M654
48-pin QFN
36 RXD
35 CTSD#
34 GND
33 RTSD#
32 INTD
31 CSD#
30 TXD
29 IOR#
28 TXC
27 CSC#
26 INTC
25 RTSC#
NC 1
NC 2
DSRA# 3
CTSA# 4
DTRA# 5
VCC 6
RTSA# 7
INTA 8
CSA# 9
TXA 10
IOW# 11
TXB 12
CSB# 13
INTB 14
RTSB# 15
GND 16
DTRB# 17
CTSB# 18
DSRB# 19
NC 20
XR16M654
80-pin LQFP
Intel Mode only
60 N.C.
59 DSRD#
58 CTSD#
57 DTRD#
56 GND
55 RTSD#
54 INTD
53 CSD#
52 TXD
51 IOR#
50 TXC
49 CSC#
48 INTC
47 RTSC#
46 VCC
45 DTRC#
44 CTSC#
43 DSRC#
42 N.C.
41 N.C.
4



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