X24164 Datasheet PDF - Xicor


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X24164
Xicor

Part Number X24164
Description Serial E2PROM
Page 14 Pages

X24164 datasheet pdf
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XPr2e4li1m6in4ary Information
16K
X24164
Serial E2PROM
2048 x 8 Bit
FEATURES
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Read Current Less Than 1 mA
—Active Write Current Less Than 3 mA
—Standby Current Less Than 50 µA
Internally Organized 2048 x 8
2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
Sixteen Byte Page Write Mode
—Minimizes Total Write Time Per Byte
Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
Pin and Function Compatible with X24C16
8-Pin Plastic DIP and 8-Lead SOIC Packages
DESCRIPTION
The X24164 is a CMOS 16,384 bit serial E2PROM,
internally organized 2048 x 8. The X24164 features a
serial interface and software protocol allowing operation
on a simple two wire bus.
Three device select inputs (S0–S2) allow up to eight
devices to share a common two wire bus.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
FUNCTIONAL DIAGRAM
(8) VCC
(4) VSS
(5) SDA
START
STOP
LOGIC
START CYCLE
H.V. GENERATION
TIMING
& CONTROL
(6) SCL
(3) S2
(2) S1
(1) S0
SLAVE ADDRESS
REGISTER
+COMPARATOR
CONTROL
LOGIC
LOAD
INC
WORD
ADDRESS
COUNTER
R/W
DOUT
ACK
PIN
XDEC
E2PROM
128 X 128
YDEC
8
CK DATA REGISTER DOUT
3846 FHD F01
© Xicor, 1991 Patents Pending
3846-1.2 7/30/96 T0/C1/D1 SH
1 Characteristics subject to change without notice



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X24164
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It is an open drain output and may be
wire-ORed with any number of open drain or open
collector outputs.
An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the Pull-Up
Resistor selection graph at the end of this data sheet.
Device Select (S0, S1, S2)
The device select inputs (S0, S1, S2) are used to set the
second, third and fourth bits of the 8 bit slave address.
This allows up to eight X24164’s to share a common
bus. These inputs can be static or actively driven. If used
statically they must be tied to VSS or VCC as appropriate.
If actively driven, they must be driven to VSS or VCC. To
be compatible with the X24C16 these pins must all be
tied to VSS.
Pin Names
Symbol
S0–S2
SDA
SCL
TEST
VSS
VCC
Description
Device Select Inputs
Serial Data
Serial Clock
Hold at VSS
Ground
Supply Voltage
3846 PGM T01
PIN CONFIGURATION
S0
S1
S2
VSS
DIP/SOIC
18
27
X24164
36
45
VCC
TEST
SCL
SDA
3846 FHD F02
2



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X24164
DEVICE OPERATION
The X24164 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data onto
the bus as a transmitter, and the receiving device as the
receiver. The device controlling the transfer is a master
and the device being controlled is the slave. The master
will always initiate data transfers, and provide the clock for
both transmit and receive operations. Therefore, the
X24164 will be considered a slave in all applications.
Figure 1. Data Validity
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24164 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
SCL
SDA
DATA STABLE DATA
CHANGE
3846 FHD F07
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V)
(6) tWR is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
Figure 2. Definition of Start and Stop
SCL
SDA
START BIT
STOP BIT
3846 FHD F08
3



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X24164
Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA when
SCL is HIGH. The stop condition is also used to place
the device into the standby power mode after a read
sequence. A stop condition can only be issued after the
transmitting device has released the bus.
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle the receiver will
pull the SDA line LOW to acknowledge that it received
the eight bits of data. Refer to Figure 3.
Figure 3. Acknowledge Response From Receiver
The X24164 will respond with an acknowledge after
recognition of a start condition and its slave address. If
both the device and a write operation have been se-
lected, the X24164 will respond with an acknowledge
after the receipt of each subsequent eight bit word.
In the read mode the X24164 will transmit eight bits of
data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no
stop condition is generated by the master, the X24164
will continue to transmit data. If an acknowledge is not
detected, the X24164 will terminate further data trans-
missions. The master must then issue a stop condition
to return the X24164 to the standby power mode and
place the device into a known state.
SCL FROM
MASTER
DATA
OUTPUT
FROM
TRANSMITTER
DATA
OUTPUT
FROM
RECEIVER
START
1
89
ACKNOWLEDGE
3846 FHD F09
4




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