The WT751002S provides protection circuits, power good output (PGO), fault protection latch
(FPOB), and a protection detector function (PSONB) control. It can minimize external components of
switching power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage level. The Under Voltage
Detector (UVD) monitors V33 and V5 input voltage level. When OVD or UVD detect the fault voltage
level, the FPOB is latched HIGH and PGO go low. When PGI detect the fault voltage level, the FPOB
would be kept LOW and PGO go low. The latch can be reset by PSONB go HIGH. There is 3.5 ms
delay time for PSONB turn off FPOB.
When PGI and OVD and UVD detect the right voltage level, the power good output (PGO) will be
• The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage.
• The Under Voltage Detector (UVD) monitors V33 and V5 input voltage.
• Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output.
• 75 ms time delay for UVD.
• 300 ms time delay for PGO.
• 38 ms for PSONB input signal De–bounce.
• 73 us for PGI and UVD internal signal De–glitches.
• 55 us for OVD internal signal De–glitches.
• 3.5 ms time delay for PSONB turn-off FPOB.
• The UVD would been disabled when PGI < 0.95V.
PIN ASSIGNMENT AND PACKAGE TYPE
8–Pin Plastic DIP
8–Pin Plastic SOP
WT751002S–N085 Pb WT751002S–S085 Pb
The Top-Side Marking would be added a dot
in the right side for lead-free package.
Weltrend Semiconductor, Inc.
Free Datasheet http://www.datasheet4u.com/