WT751002S Datasheet PDF - Weltrend


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WT751002S
Weltrend

Part Number WT751002S
Description PC POWER SUPPLY SUPERVISOR
Page 11 Pages

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Weltrend Semiconductor, Inc.
`
WT751002S
PC POWER SUPPLY SUPERVISOR
Data Sheet
REV. 1.00
November 04, 2005
The information in this document is subject to change without notice.
©Weltrend Semiconductor, Inc. All Rights Reserved.
24 2
2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan
TEL:886-3-5780241 FAX:886-3-5794278.5770419
Email:support@weltrend.com.tw
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WT751002S
Rev. 1.00
GENERAL DESCRIPTION
The WT751002S provides protection circuits, power good output (PGO), fault protection latch
(FPOB), and a protection detector function (PSONB) control. It can minimize external components of
switching power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage level. The Under Voltage
Detector (UVD) monitors V33 and V5 input voltage level. When OVD or UVD detect the fault voltage
level, the FPOB is latched HIGH and PGO go low. When PGI detect the fault voltage level, the FPOB
would be kept LOW and PGO go low. The latch can be reset by PSONB go HIGH. There is 3.5 ms
delay time for PSONB turn off FPOB.
When PGI and OVD and UVD detect the right voltage level, the power good output (PGO) will be
issue.
FEATURES
The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage.
The Under Voltage Detector (UVD) monitors V33 and V5 input voltage.
Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output.
75 ms time delay for UVD.
300 ms time delay for PGO.
38 ms for PSONB input signal De–bounce.
73 us for PGI and UVD internal signal De–glitches.
55 us for OVD internal signal De–glitches.
3.5 ms time delay for PSONB turn-off FPOB.
The UVD would been disabled when PGI < 0.95V.
PIN ASSIGNMENT AND PACKAGE TYPE
WT751002S
PGI
GND
FPOB
PSONB
1
2
3
4
8 PGO
7 VCC
6 V5
5 V33
ORDERING INFORMATION
PACKAGE
8–Pin Plastic DIP
8–Pin Plastic SOP
CHIP
Lead–Free Pb
WT751002S–N085
WT751002S–S085
WT751002S–N085 Pb WT751002S–S085 Pb
WT751002S-HXXX
The Top-Side Marking would be added a dot
in the right side for lead-free package.
Weltrend Semiconductor, Inc.
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WT751002S
Rev. 1.00
PIN DESCRIPTION
Pin Name TYPE
PGI I
GND
P
FPOB
O
PSONB
I
V33 I
V5 I
VCC
I
PGO
O
Description
Power good input signal pin
Ground
Fault protection output pin, open drain output
On/Off switch input
3.3V over voltage & under voltage
5V over voltage & under voltage
Power supply
Power good output signal pin, open drain output
FUNCTION TABLE
PGI
< 0.95V
< 0.95V
< 0.95V
0.95V < PGI < 1.2V
0.95V < PGI < 1.2V
0.95V < PGI < 1.2V
PGI > 1.2
PGI > 1.2
PGI > 1.2
X
X = don’t care
PDON_N
L
L
L
L
L
L
L
L
L
H
UVD
No
No
Yes
No
No
Yes
No
No
Yes
X
OVD
No
Yes
No
No
Yes
No
No
Yes
No
X
FPL_N
L
H
L
L
H
H
L
H
H
H
PGO
L
L
L
L
L
L
H
L
L
L
Weltrend Semiconductor, Inc.
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WT751002S
Rev. 1.00
BLOCK DIAGRAM
WT751002S- 080 WT750202C-085 BLOCK DIAGRAM
VCC
VCCI
PSONB
1.2V ~ 1.8V
PWR
38ms
debounce
V33
V5
VCC
-
+
UN
-
+
OV
-
+
UN
-
+
OV
-
+
OV
1.2V
Power On Reset
3.5ms
clr
delay
clr 75ms
delay
PWR
Bandgap
Reference
Internal
Power
clr
73us
debounce
clr
55us
debounce
PWR
OSC
R
SQ
VREF = 1.2V
VCCI = 3.6V
CLK
FPOB
PGI 2 = 0.95V
+
-
UN
PGI
+
-
UN
PGI 1 = 1.2V
clr
73us
debounce
300ms
clr
delay
PGO
Weltrend Semiconductor, Inc.
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