WS512K32BV Datasheet PDF - ETC

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WS512K32BV
ETC

Part Number WS512K32BV
Description 512Kx32 3.3V SRAM MODULE
Page 8 Pages


WS512K32BV datasheet pdf
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WS512K32BV-XXXE
512Kx32 3.3V SRAM MODULE PRELIMINARY*
FEATURES
s Access Times of 15, 17, 20ns
s MIL-STD-883 Compliant Devices Available
s Low Voltage Operation
s Packaging
• 66-pin, PGA Type, 1.385 inch square Hermetic Ceramic HIP
(Package 402)
• 68 lead, Hermetic CQFP (G2), 22mm (0.880 inch) square
(Package 500). Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint
s Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8
s Radiation Tolerant with Epitaxial Layer Die
s Commercial, Industrial and Military Temperature Ranges
s 3.3 Volt Power Supply
s BiCMOS
s TTL Compatible Inputs and Outputs
s Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
s Weight
WS512K32BV-XG2XE - 8 grams typical
WS512K32NBV-XH2XE - 13 grams typical
* This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
This speed is Advanced information.
PIN CONFIGURATION FOR WS512K32NBV-XH2XE
TOP VIEW
PIN DESCRIPTION
1 12 23
I/O8 WE2 I/O15
I/O9 CS2 I/O14
I/O10
GND
I/O13
A13
I/O11
I/O12
A14 A10
OE
A15 A11
A18
A16 A12
WE1
A17 VCC I/O7
I/O0 CS1 I/O6
I/O1 NC
I/O5
34 45 56
I/O24
VCC
I/O31
I/O25
CS4
I/O30
I/O26
WE4
I/O29
A6 I/O27
I/O28
A7 A3
A0
NC A4
A1
A8 A5
A2
A9 WE3 I/O23
I/O16
CS3
I/O22
I/O17 GND
I/O21
I/O0-31
A0-18
WE1-4
CS1-4
OE
VCC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
OE
A0-18
BLOCK DIAGRAM
W E1C S 1
W E2 C S2
W E3 C S 3
W E 4C S4
512K x 8
512K x 8
512K x 8
512K x 8
I/O2 I/O3 I/O4
11 22
33
I/O18
I/O19
I/O20
44 55 66
8
I/O0-7
8
I/O8-15
8
I/O16-23
8
I/O24-31
4
February 1998
1 White Microelectronics • Phoenix, AZ • (602) 437-1520



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WS512K32BV-XXXE
PIN CONFIGURATION FOR WS512K32BV-XG2XE
TOP VIEW
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
A0-18 Address Inputs
I/O0 10
60 I/O16
WE1-4 Write Enables
I/O1 11
I/O2 12
59 I/O17
58 I/O18
CS1-4
Chip Selects
I/O3 13
I/O4 14
57 I/O19
56 I/O20
OE Output Enable
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
15
16
17
18
19
20
21
22
55 I/O21
54 I/O22
53 I/O23
52 GND
51 I/O24
50 I/O25
49 I/O26
48 I/O27
0.940"
The White 68 lead G2 CQFP fills
the same fit and function as the
JEDEC 68 lead CQFJ or 68 PLCC.
But the G2 has the TCE and lead
Vcc Power Supply
GND Ground
NC Not Connected
4 I/O12
I/O13
I/O14
I/O15
23 47
24 46
25 45
26 44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O28
I/O29
I/O30
I/O31
inspection advantage of the
CQFP form.
BLOCK DIAGRAM
W E1C S 1
W E2 C S2
W E3 C S 3
OE
W E 4C S4
A0-18
512K x 8
512K x 8
512K x 8
512K x 8
8
I/O0-7
8
I/O8-15
8
I/O16-23
8
I/O24-31
White Microelectronics • Phoenix, AZ • (602) 437-1520
2



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WS512K32BV-XXXE
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Operating Temperature
TA
Storage Temperature
TSTG
Signal Voltage Relative to GND VG
Junction Temperature
TJ
Supply Voltage
VCC
Min
-55
-65
-0.5
-0.5
Max
+125
+150
4.6
150
4.6
Unit
°C
°C
V
°C
V
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
VCC
VIH
VIL
Min Max Unit
3.0 3.6 V
2.2
VCC + 0.3
V
-0.3 +0.8 V
TRUTH TABLE
CS OE WE
Mode
Data I/O
Power
H
X X Standby
High Z
Standby
L
LH
Read
Data Out
Active
L X L Write
Data In
Active
L
H
H Out Disable
High Z
Active
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
Conditions
OE capacitance
COE VIN = 0 V, f = 1.0 MHz
WE1-4 capacitance
HIP (PGA)
CQFP G2
CWE VIN = 0 V, f = 1.0 MHz
CS1-4 capacitance
CCS VIN = 0 V, f = 1.0 MHz
Data I/O capacitance
CI/O VI/O = 0 V, f = 1.0 MHz
Address input capacitance CAD VIN = 0 V, f = 1.0 MHz
This parameter is guaranteed by design but not tested.
Max
50
20
20
20
20
50
Unit
pF
pF
pF
pF
pF
4
DC CHARACTERISTICS
(VCC = 3.3V ± 0.3V, VSS = 0V, TA = -55°C to +125°C)
Parameter
Sym
Conditions
Input Leakage Current
ILI
Output Leakage Current
ILO
Operating Supply Current (x 32 Mode)
ICC x 32
Standby Current
ISB
Output Low Voltage
VOL
Output High Voltage
VOH
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
VIN = GND to VCC
CS = VIH, OE = VIH, VOUT = GND to VCC
CS = VIL, OE = VIH, f = 5MHz, VCC = 3.6V
CS = VIH, OE = VIH, f = 5MHz, VCC = 3.6V
IOL = 8mA
IOH = -4.0mA
Min
2.4
Max
10
10
480
110
0.4
Units
µA
µA
mA
mA
V
V
3 White Microelectronics • Phoenix, AZ • (602) 437-1520



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WS512K32BV-XXXE
AC CHARACTERISTICS
(VCC = 3.3V, TA = -55°C to +125°C)
Parameter
Symbol
Read Cycle
Read Cycle Time
tRC
Address Access Time
tAA
Output Hold from Address Change
tOH
Chip Select Access Time
tACS
Output Enable to Output Valid
tOE
Chip Select to Output in Low Z
tCLZ1
Output Enable to Output in Low Z
tOLZ1
Chip Disable to Output in High Z
tCHZ1
Output Disable to Output in High Z
tOHZ1
1. This parameter is guaranteed by design but not tested.
* Advanced information.
-15*
Min Max
15
15
0
15
7
2
0
7
7
-17
Min Max
17
17
0
17
8
2
0
8
8
4 AC CHARACTERISTICS
(VCC = 3.3V, TA = -55°C to +125°C)
Parameter
Symbol
Write Cycle
Write Cycle Time
tWC
Chip Select to End of Write
tCW
Address Valid to End of Write
tAW
Data Valid to End of Write
tDW
Write Pulse Width
tWP
Address Setup Time
tAS
Address Hold Time
tAH
Output Active from End of Write
tOW1
Write Enable to Output in High Z
tWHZ1
Data Hold Time
tDH
1. This parameter is guaranteed by design but not tested.
* Advanced information.
-15*
Min Max
15
10
10
8
12
0
0
2
8
0
-17
Min Max
17
12
12
9
14
0
0
3
8
0
-20
Min Max
20
20
0
20
10
2
0
10
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
-20
Min Max
20
14
14
10
14
0
0
3
9
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CIRCUIT
Current Source
I OL
D.U.T.
Ceff = 50 pf
Current Source
I OH
White Microelectronics • Phoenix, AZ • (602) 437-1520
VZ 1.5V
(Bipolar Supply)
4
AC TEST CONDITIONS
Parameter
Typ Unit
Input Pulse Levels
VIL = 0, VIH = 2.5 V
Input Rise and Fall
5 ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.



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