TC58TEG5DCJTAI0 Datasheet PDF - Toshiba

www.Datasheet-PDF.com

TC58TEG5DCJTAI0
Toshiba

Part Number TC58TEG5DCJTAI0
Description NAND memory Toggle DDR1.0
Page 30 Pages


TC58TEG5DCJTAI0 datasheet pdf
View PDF for PC
TC58TEG5DCJTAI0 pdf
View PDF for Mobile


No Preview Available !

TOSHIBA CONFIDENTIAL TC58TEG5DCJTAx0
TOSHIBA
NAND memory
Toggle DDR1.0
Technical Data Sheet
Rev. 0.2
2012 – 03 – 01
TOSHIBA
Semiconductor & Storage Products
Memory Division
0 TENTATIVE 2012-03-01C



No Preview Available !

TOSHIBA CONFIDENTIAL TC58TEG5DCJTAx0
CONTENTS
1. INTRODUCTION ............................................................................................................................................. 5
1.1. General Description ...................................................................................................................................... 5
1.2. Definitions and Abbreviations...................................................................................................................... 5
1.3. Features ........................................................................................................................................................ 7
1.4. Diagram Legend............................................................................................................................................ 8
2. PHYSICAL INTERFACE.................................................................................................................................. 9
2.1. Pin Descriptions............................................................................................................................................ 9
2.2. PIN ASSIGNMENT (TOP VIEW) .............................................................................................................. 10
2.3. BLOCK DIAGRAM ..................................................................................................................................... 11
2.4. Independent Data Buses ............................................................................................................................ 12
2.5. Absolute Maximum DC Rating .................................................................................................................. 12
2.6. Operating Temperature Condition............................................................................................................. 13
2.7. Recommended Operating Conditions......................................................................................................... 13
2.8. Valid Blocks................................................................................................................................................. 13
2.9. AC Overshoot/Undershoot Requirements.................................................................................................. 14
2.10. DC Operating Characteristics.................................................................................................................... 15
2.11. Input/Output Capacitance (TOPER =25, f=1MHz) ................................................................................... 17
2.12. DQ Driver Strength .................................................................................................................................... 17
2.13. Input/Output Slew rate .............................................................................................................................. 19
2.14. R/ B and SR[6] Relationship..................................................................................................................... 21
2.15. Write Protect ............................................................................................................................................... 21
3. MEMORY ORGANIZATION .......................................................................................................................... 22
3.1. Addressing................................................................................................................................................... 23
3.1.1.
Plane Addressing .................................................................................................................................... 23
3.1.2.
Extended Blocks Arrangement .............................................................................................................. 24
3.2. Factory Defect Mapping ............................................................................................................................. 25
3.2.1.
Device Requirements.............................................................................................................................. 25
3.2.2.
Host Requirements ................................................................................................................................. 26
4. FUNCTION DESCRIPTION .......................................................................................................................... 27
4.1. Discovery and Initialization ....................................................................................................................... 27
4.1.1.
Single Channel Discovery ...................................................................................................................... 27
4.1.2.
Dual Channel Discovery......................................................................................................................... 27
4.2. Mode Selection ............................................................................................................................................ 29
4.2.1.
Toggle DDR1.0 General Timing ............................................................................................................. 30
4.2.1.1. Command Latch Cycle............................................................................................................................ 30
4.2.1.2. Address Latch Cycle ............................................................................................................................... 30
4.2.1.3. Basic Data Input Timing ........................................................................................................................ 31
4.2.1.4. Basic Data Output Timing ..................................................................................................................... 32
4.2.1.5. Read ID Operation.................................................................................................................................. 33
4.2.1.6. Status Read Cycle................................................................................................................................... 34
4.2.1.7. Set Feature ............................................................................................................................................. 35
4.2.1.8. Get Feature ............................................................................................................................................. 35
4.2.1.9. Page Read Operation .............................................................................................................................. 36
4.2.1.10. Page Program Operation.................................................................................................................... 37
4.2.2.
SDR General Timing .............................................................................................................................. 38
4.2.2.1. Command Latch Cycle............................................................................................................................ 38
4.2.2.2. Address Latch Cycle ............................................................................................................................... 38
4.2.2.3. Basic Data Input Timing ........................................................................................................................ 39
4.2.2.4. Basic Data Output Timing ..................................................................................................................... 39
4.2.2.5. Read ID Operation.................................................................................................................................. 40
4.2.2.6. Status Read Cycle................................................................................................................................... 40
4.2.2.7. Set Feature ............................................................................................................................................. 41
4.2.2.8. Get Feature ............................................................................................................................................. 41
4.2.2.9. Page Read Operation .............................................................................................................................. 42
4.2.2.10. Page Program Operation.................................................................................................................... 43
4.3. AC Timing Characteristics ......................................................................................................................... 44
4.3.1.
Timing Parameters Description............................................................................................................. 44
4.3.2.
Timing Parameters Table ....................................................................................................................... 46
5. COMMAND DESCRIPTION AND DEVICE OPERATION .......................................................................... 49
1 TENTATIVE 2012-03-01C



No Preview Available !

TOSHIBA CONFIDENTIAL TC58TEG5DCJTAx0
5.1. Basic Command Sets .................................................................................................................................. 49
5.2. Basic Operation........................................................................................................................................... 50
5.2.1.
Page Read Operation .............................................................................................................................. 50
5.2.1.1. Page Read Operation with Random Data Output................................................................................. 50
5.2.1.2. Data Out After Status Read ................................................................................................................... 51
5.2.2.
Sequential Cache Read Operation ......................................................................................................... 51
5.2.3.
Random Cache Read Operation ............................................................................................................. 52
5.2.4.
Page Program Operation ........................................................................................................................ 52
5.2.4.1. Program Operation with Random Data Input ...................................................................................... 52
5.2.5.
Cache Program Operation...................................................................................................................... 53
5.2.6.
Block Erase Operation............................................................................................................................ 53
5.2.7.
Copy-Back Program Operation .............................................................................................................. 54
5.2.7.1. Copy-Back Program Operation with Random Data Input.................................................................... 54
5.2.8.
Set Feature Operation............................................................................................................................ 55
5.2.8.1. Driver strength setting (10h) ................................................................................................................. 56
5.2.9.
Get Feature Operation ........................................................................................................................... 56
5.2.10. Read ID Operation.................................................................................................................................. 57
5.2.10.1. 00h Address ID Definition.................................................................................................................. 57
5.2.10.2. 40h Address ID Definition.................................................................................................................. 58
5.2.11. Read Status Operation ........................................................................................................................... 59
5.2.12. Reset Operation ...................................................................................................................................... 60
5.2.13. Reset LUN Operation ............................................................................................................................. 62
5.3. Extended Operation.................................................................................................................................... 62
5.3.1.
Extended Command Sets ....................................................................................................................... 62
5.3.2.
Page Copy (2) Operation......................................................................................................................... 63
5.3.3.
Device Identification Table Read Operation.......................................................................................... 64
5.3.4.
Device Identification Table Definition ................................................................................................... 65
5.3.5.
Read Status Enhanced ........................................................................................................................... 70
5.3.6.
Read LUN #0 Status Operation ............................................................................................................. 71
6. APPLICATION NOTES AND COMMENTS.................................................................................................. 72
7. Package Dimensions ....................................................................................................................................... 78
8. Revision History.............................................................................................................................................. 79
2 TENTATIVE 2012-03-01C



No Preview Available !

TOSHIBA CONFIDENTIAL TC58TEG5DCJTAx0
LIST of FIGURES
Figure 1. Block Diagram .......................................................................................................................................... 11
Figure 2. Overshoot/Undershoot Diagram .............................................................................................................. 14
Figure 3. tRISE and tFALL Definition for Output Slew Rate ...................................................................................... 20
Figure 4. Write Protect timing requirements of the Program operation ............................................................... 21
Figure 5. Write Protect timing requirements of the Erase operation .................................................................... 21
Figure 6. Target Organization ................................................................................................................................. 22
Figure 7. Row Address Layout ................................................................................................................................. 23
Figure 8. Position of Plane Address ......................................................................................................................... 23
Figure 9. Area marked in first or last page of block indicating defect ................................................................... 25
Figure 10. Flow chart to create initial invalid block table ..................................................................................... 26
Figure 11. Initialization Timing............................................................................................................................... 28
Figure 12. Command Latch Cycle Timing............................................................................................................... 30
Figure 13. Address Latch Cycle Timing .................................................................................................................. 30
Figure 14. Basic Data Input Timing........................................................................................................................ 31
Figure 15. Basic Data Output Timing ..................................................................................................................... 32
Figure 16. Read ID Operation Timing..................................................................................................................... 33
Figure 17. Status Read Cycle Timing ...................................................................................................................... 34
Figure 18. Set Feature Timing................................................................................................................................. 35
Figure 19. Get Feature Timing ................................................................................................................................ 35
Figure 20. Page Read Operation Timing ................................................................................................................. 36
Figure 21. Read Hold Operation with CE high..................................................................................................... 36
Figure 22. Page Program Operation Timing ........................................................................................................... 37
Figure 23. Command Latch Cycle Timing............................................................................................................... 38
Figure 24. Address Latch Cycle Timing .................................................................................................................. 38
Figure 25. Basic Data Input Timing........................................................................................................................ 39
Figure 26. Basic Data Output Timing ..................................................................................................................... 39
Figure 27. Read ID Operation Timing..................................................................................................................... 40
Figure 28. Status Read Cycle Timing ...................................................................................................................... 40
Figure 29. Set Feature Timing................................................................................................................................. 41
Figure 30. Get Feature Timing ................................................................................................................................ 41
Figure 31. Page Read Operation Timing ................................................................................................................. 42
Figure 32. Page Program Operation Timing ........................................................................................................... 43
Figure 33. Page Read Timing................................................................................................................................... 50
Figure 34. Page Read with Random Data Output Timing ..................................................................................... 50
Figure 35. Data Out After Status Read Timing ...................................................................................................... 51
Figure 36. Sequential Cache Read Timing.............................................................................................................. 51
Figure 37. Random Cache Read Timing .................................................................................................................. 52
Figure 38. Page Program Timing............................................................................................................................. 52
Figure 39. Program operation with Random Data Input Timing .......................................................................... 52
Figure 40. Cache Program Timing........................................................................................................................... 53
Figure 41. Block Erase Timing ................................................................................................................................ 53
Figure 42. Copy-Back Program Timing ................................................................................................................... 54
Figure 43. Copy-Back Program with Random Data Input Timing ........................................................................ 54
Figure 44. Set Feature Timing................................................................................................................................. 55
Figure 45. Get Feature Timing ................................................................................................................................ 56
Figure 46. Read ID Timing ...................................................................................................................................... 57
Figure 47. Read Status Timing ................................................................................................................................ 59
Figure 48. Reset timing............................................................................................................................................ 60
Figure 49. Reset timing during Program operation................................................................................................ 60
Figure 50. Reset timing during Erase operation..................................................................................................... 60
Figure 51. Reset timing during Read operation...................................................................................................... 60
Figure 52. Status Read after Reset operation ......................................................................................................... 61
Figure 53. Successive Reset operation..................................................................................................................... 61
Figure 54. Single LUN Reset Timing ...................................................................................................................... 62
Figure 55. Example Timing with Page Copy (2) ..................................................................................................... 63
Figure 56. Device Identification Table Read Timing .............................................................................................. 64
Figure 57. Read Status Timing ................................................................................................................................ 70
Figure 58. Read LUN#0 Status Timing................................................................................................................... 71
3 TENTATIVE 2012-03-01C



TC58TEG5DCJTAI0 datasheet pdf
Download PDF
TC58TEG5DCJTAI0 pdf
View PDF for Mobile


Related : Start with TC58TEG5DCJTAI Part Numbers by
TC58TEG5DCJTAI0 NAND memory Toggle DDR1.0 TC58TEG5DCJTAI0
Toshiba
TC58TEG5DCJTAI0 pdf

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Privacy Policy + Contact