Tripath Technology, Inc. - Technical Information
OUTP2 & OUTM2;
OUTP1 & OUTM1
9, 16, 32
Input stage output pins.
Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with
approximately 2.4VDC bias.
Input stage bias voltage (approximately 2.4VDC).
When set to logic high, device goes into low power mode. If not used, this pin
should be grounded
A logic high output indicates thermal overload, or an output is shorted to ground,
or another output.
Power Grounds (high current)
Digital Ground. Connect to AGND locally (near the TAA2008).
Bridged output pairs
Supply pins for high current H-bridges, nominally 12VDC.
Analog 12VDC. Connect to same supply as VDD1 and VDD2.
Charge pump output (nominally 10V above VDDA)
Regulated 5VDC source used to supply power to the input section (pins 23 and
Charge pump switching pins. DCAP1 (pin 22) is a free running 300kHz square
wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 21) is level
shifted 10 volts above DCAP1 (pin 22) with the same amplitude (12Vpp nominal),
frequency, and phase as DCAP1.
Digital 5VDC, Analog 5VDC
Internal reference voltage; approximately 1.0 VDC.
A logic low output indicates the input signal has overloaded the amplifier.
When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays in
the mute mode. This pin should be tied to GND if not used.
Not connected. Not bonded internally.
4 TAA2008 –KLi/1.0/05.06