STU10NM60N Datasheet PDF - ST Microelectronics

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STU10NM60N
ST Microelectronics

Part Number STU10NM60N
Description Power MOSFETs
Page 28 Pages


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STD10NM60N, STF10NM60N,
STP10NM60N, STU10NM60N
N-channel 600 V, 0.53 typ., 10 A MDmesh™ II Power MOSFET
in DPAK, TO-220FP, TO-220 and IPAK packages
Datasheet - production data
7$%


DPAK
7$%



TO-220



TO-220FP
7$%
IPAK



Features
Order code
VDS @TJ
max.
STD10NM60N
STF10NM60N
STP10NM60N
STU10NM60N
650 V
RDS(on)
max.
0.55
ID PTOT
10 A
70 W
25 W
70 W
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Figure 1. Internal schematic diagram
Applications
' 7$%
Switching applications
Description
* 
6 
Order code
These devices are N-channel Power MOSFETs
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
$0Y
Table 1. Device summary
Marking
Package
Packing
STD10NM60N
STF10NM60N
STP10NM60N
STU10NM60N
10NM60N
10NM60N
10NM60N
10NM60N
DPAK
TO-220FP
TO-220
IPAK
Tape and reel
Tube
Tube
Tube
December 2015
This is information on a product in full production.
DocID028726 Rev 1
1/28
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Contents
Contents
STD10NM60N, STF10NM60N, STP10NM60N, STU10NM60N
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves)
........................... 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 STD10NM60N, DPAK (TO-252) package information . . . . . . . . . . . . . . . 10
4.2 STF10NM60N, TO-220FP package information . . . . . . . . . . . . . . . . . . . 17
4.3 STP10NM60N, TO-220 package information . . . . . . . . . . . . . . . . . . . . . . 19
4.4 STU10NM60N, IPAK (TO-251) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 DocID028726 Rev 1



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STD10NM60N, STF10NM60N, STP10NM60N, STU10NM60N
1 Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
TO-220 TO-220FP IPAK DPAK
VGS
ID
ID
IDM(2)
PTOT
dv/dt(3)
Gate- source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Peak diode recovery voltage slope
10
5
32
70
± 25
10 (1)
5 (1)
32 (1)
25
15
VISO
TJ
Tstg
Insulation withstand voltage (RMS) from all
three leads to external heat sink
(t =1 s; TC = 25 °C)
Operating junction temperature
Storage temperature
2500
- 55 to 150
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. ISD 10 A, di/dt 400 A/µs, VDS peak V(BR)DSS, VDD = 80% V(BR)DSS.
10
5
32
70
V
A
A
A
W
V/ns
V
°C
Symbol
Table 3. Thermal data
Parameter
Value
Unit
TO-220 TO-220FP IPAK DPAK
Rthj-case
Rthj-amb
Rthj-pcb
Thermal resistance junction-case max.
Thermal resistance junction-ambient max.
Thermal resistance junction-pcb max.
1.79 5
62.50
1.79
100
50
°C/W
°C/W
°C/W
Table 4. Avalanche characteristics
Symbol
Parameter
Value
IAS
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj max.)
Single pulse avalanche energy
EAS
(starting TJ = 25 °C, ID = IAS, VDD = 50 V)
4
200
Unit
A
mJ
DocID028726 Rev 1
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Electrical characteristics
STD10NM60N, STF10NM60N, STP10NM60N, STU10NM60N
2 Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On/off-states
Test conditions
V(BR)DSS
IDSS
IGSS
VGS(th)
RDS(on)
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
ID = 1 mA, VGS = 0,
TC = 150 °C
Zero-gate voltage
VDS = 600 V
drain current (VGS = 0) VDS = 600 V, TC = 125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 25 V
Gate threshold voltage VDS = VGS, ID = 250 µA
Static drain-source on-
resistance
VGS = 10 V, ID = 4 A
Min.
600
Typ.
650
Max. Unit
V
1
µA
100
± 100 nA
2 3 4V
0.53 0.55
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0
- 540 - pF
- 44 - pF
- 1.2 - pF
Equivalent
Coss
(1)
eq
capacitance time
related
VDS = 0 to 480 V, VGS = 0
- 110 - pF
Rg Gate input resistance f=1 MHz open drain
- 6 -Ω
Qg Total gate charge
VDD = 480 V, ID = 8 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 17)
- 19 - nC
- 3 - nC
- 10 - nC
1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss
when VDS increases from 0 to 80% VDSS.
4/28 DocID028726 Rev 1



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