STL35NF10 Datasheet PDF - STMicroelectronics

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STL35NF10
STMicroelectronics

Part Number STL35NF10
Description N-CHANNEL MOSFET
Page 6 Pages


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STL35NF10
N-CHANNEL 100V - 0.025- 35A PowerFLAT™
LOW GATE CHARGE STripFET™ MOSFET
PRELIMINARY DATA
TYPE
VDSS
RDS(on)
ID
STL35NF10
100 V < 0.030 35 A
s TYPICAL RDS(on) = 0.025
s IMPROVED DIE-TO-FOOTPRINT RATIO
s VERY LOW PROFILE PACKAGE
DESCRIPTION
This Power MOSFET is the second generation of
STMicroelectronics unique “STripFET™” technolo-
gy. The resulting transistor shows extremely low on-
resistance and minimal gate charge. The new Pow-
erFLAT™ package allows a significant reduction in
board space without compromising performance.
PowerFLAT™(6x5)
(Chip Scale Package)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH EFFICIENCY ISOLATED DC/DC
CONVETERS
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
IDM (q) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
EAS (1) Single Pulse Avalanche Energy
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(q) Pulse width limited by safe operating area
August 2001
Value
100
100
± 20
35
22
Unit
V
V
V
A
A
140
80
0.64
135
–65 to 150
–55 to 150
A
W
W/°C
mJ
°C
°C
(1) Starting Tj = 25°C, ID = 35A, VDD = 50V
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STL35NF10
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb Thermal Resistance Junction-ambient Max
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1.56 °C/W
50 °C/W
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
100
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
10
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
±100
Unit
V
µA
µA
nA
ON (1)
Symbol
VGS(th)
RDS(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
Test Conditions
VDS = VGS, ID = 250µA
VGS = 10 V, ID = 17.5 A
Min.
2
Typ.
2.8
0.025
Max.
4
0.030
Unit
V
DYNAMIC
Symbol
gfs (1)
Ciss
Coss
Crss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
VDS =20 V, ID = 15 A
VDS = 25 V, f = 1 MHz, VGS = 0
Min.
Typ.
18
1780
265
162
Max.
Unit
S
pF
pF
pF
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ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
Parameter
Test Conditions
td(on)
tr
Turn-on Delay Time
Rise Time
VDD = 50 V, ID = 17.5 A
RG = 4.7VGS = 10V
(see test circuit, Figure 1)
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 80 V, ID = 35 A,
VGS = 10 V
(see test circuit, Figure 2)
SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off-Delay Time
Fall Time
Test Conditions
VDD = 50 V, ID = 17.5 A,
RG = 4.7Ω, VGS = 10 V
(see test circuit, Figure 1)
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
ISD Source-drain Current
ISDM (1) Source-drain Current (pulsed)
VSD (2) Forward On Voltage
ISD = 18 A, VGS = 0
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 35 A, di/dt = 100A/µs,
VDD = 25 V, Tj = 150°C
(see test circuit, Figure 3)
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
STL35NF10
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Min.
Typ.
28
63
60
10
23
Max.
80
Unit
ns
ns
nC
nC
nC
Min.
Typ.
84
28
Max.
Unit
ns
ns
Min.
Typ.
114
456
8
Max.
35
140
1.2
Unit
A
A
V
ns
nC
A
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STL35NF10
Fig. 1: Switching Times Test Circuit For
Resistive Load
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Fig. 2: Gate Charge test Circuit
Fig. 3: Test Circuit For Diode Recovery Behaviour
4/6



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