STI5107 Datasheet PDF - STMicroelectronics

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STI5107
STMicroelectronics

Part Number STI5107
Description Low-cost interactive set-top box decoder
Page 14 Pages


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STi5107
Low-cost interactive set-top box decoder
Data Brief
Features
Enhanced ST20 32-bit VL-RISC CPU
www.DataSheet4U.comUnified memory interface
– up to166 MHz,16-bit wide SDR/DDR
SDRAM interface
Programmable flash memory interface
Programmable transport interface (PTI)
– single transport stream input
– support for DVB transport streams
MPEG-2 MP@ML video decoder
Graphics and display
– 3 display planes
– 8 bpp CLUT graphics
– 2D paced blitter engine with fill function
– digital video output: compliant with CCIR
601/CCIR 656
PAL/NTSC/SECAM encoder
– RGB, CVBS, Y/C and YUV outputs with
four 10-bit DAC outputs.
– encoding of CGMS, Teletext, WSS, VPS,
close caption
Audio subsystem
– simultaneous MPEG audio decode and
output of Dolby streams on S/PDIF
– IEC958/IEC1937 digital audio output
interface
– integrated stereo audio DAC system
Central DMA controller
On-chip peripherals
– 2 ASCs (UARTs) with Tx and Rx FIFOs
– 3 banks of 8-bit and 1 bank of 7-bit parallel
I/O
– 1 smartcard interface and clock generator
– infrared transmitter/receiver
– integrated VCXO
Advanced security ready
JTAG/TAP interface
Package
– 23 mm x 23mm PBGA32
– 24 mm x 24 mm LQFP216
Flash
peripherals
AudioL
AudioR
S/PDIF
ST20 C1 core 200 MHz
DCU 2K SRAM
Int controller
4K ICache 4K DCache
16
FMI
Audio
decoder
Audio
DACs
PCM
player
S/PDIF
player
Comms peripherals
16
UART (2) SmartCard 1
IR Tx/Rx GPIO (4)
ILC SSCs (2)
Comms block
DDR/SDR
SDRAM
16
LMI
STx5107 interconnect
PTI ClockGen
Reset
System services
FDMA
MP@ML
Video decoder
2D graphics
Blitter display
TV out
Video quad
DACs
TS in
DVO Video output
RGB / YC / CVBS
December 2006
Rev 1
For further information contact your local STMicroelectronics sales office.
1/14
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Description
1 Description
STi5107
1.1
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General
The STi5107 is the latest in the family of Omega2 set-top box ICs providing a high-
performance, low-cost system-on-chip(SoC) for MPEG processing in cable, satellite or
digital terrestrial STBs. It is a pin compatible IC derived from the STx5105, that supports
multiple platform using a unified architecture. STi5107 is compatible with the latest CA
advanced security specifications.
The STi5107 delivers enhanced performance with respect to previous devices. Main
memory is based upon a single 16-bit external SDR/DDR SDRAM.
The display architecture of the device is based upon a high performance blitter engine that
supports CLUT8 and RGB16 formats for background, video and OSD/graphics displays. It
makes the porting of middleware easier with greater rendering.
1.2 Applications
Typical applications are shown in the Figure 1, Figure 2 and Figure 3.
Figure 1. Basic terrestrial pay TV
Tuner
SDR
DDR
IR Tx/Rx
STV0362
DV-T Rx
Transport
stream in
STi5107
RGB or
YC+CVBS
CVBS
Smart
Card
Flash
VCR
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STi5107
Figure 2. Basic satellite pay TV receiver
STV06000
SDR or
DDR
IR Tx/Rx
Description
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STV0288
Transport
stream in
STi5107
RGB or
YC+CVBS
QPSK ZIF Rx
CVBS
Smart
Card
Flash
VCR
Figure 3. Basic cable pay TV receiver
SDR or
DDR
IR Tx/Rx
QAM demodulator
Transport
stream in
STV0297/J
STi5107
RGB or
YC+CVBS
CVBS
Smart
Card
Flash
VCR
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Description
STi5107
1.3
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Main features
Enhanced ST20 32-bit VL-RISC CPU
– 200 MHz, single cycle cache/4-Kbyte instruction cache, 4 Kbyte data cache,
2 Kbyte SRAM
Unified memory interface
– up to166 MHz,16-bit wide SDR/DDR SDRAM interface
Programmable flash memory interface
– 4 separately configurable banks, 8/16-bits wide
– SRAM, peripheral, flash, SFlash™ support
– support for low cost DVB-CI
Programmable transport interface (PTI)
– single transport stream input
– support for DVB transport streams
– integrated DVB, ICAM descramblers
MPEG-2 MP@ML video decoder
– fully programmable horizontal and vertical SRCs
Graphics and display
– 3 display planes
– 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries. 16 bpp true color
graphics, RGB565, ARGB1555, ARGB4444 formats. Link-list control
– alpha blending, antialiasing, antiflutter, antiflicker filters
– 2D paced blitter engine with fill function
– blitter based display compositor
– digital video output: compliant with CCIR 601/CCIR 656
PAL/NTSC/SECAM encoder
– RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. RGB/CVBS or
YUV/CVBS or YC/CVBS
– encoding of CGMS, Teletext, WSS, VPS, close caption
Audio subsystem
– MPEG-1 layers I/II
– simultaneous MPEG audio decode and output of Dolby streams on S/PDIF
– IEC958/IEC1937 digital audio output interface
– integrated stereo audio DAC system
Central DMA controller
On-chip peripherals
– 2 ASCs (UARTs) with Tx and Rx FIFOs
– 3 banks of 8-bit and 1 bank of 7-bit parallel I/O
– 1 smartcard interface and clock generator
– 2 SSCs for I2C/SPI master/slave interfaces
– infrared transmitter/receiver
– integrated VCXO
– low-power / RTC / watchdog controller
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