ST92R195B Datasheet PDF - ST Microelectronics

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ST92R195B
ST Microelectronics

Part Number ST92R195B
Description ROMLESS HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
Page 18 Pages


ST92R195B datasheet pdf
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ST92R195B
ROMLESS HCMOS MCU WITH
ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
DATA BRIEFING
s Register File based 8/16 bit Core Architecture
with RUN, WFI, SLOW and HALT modes
s 0°C to +70°C Operating Temperature Range
available
s Up to 24 MHz Operation @ 5V±10%
s Minimum instruction cycle time: 375ns at
16 MHz internal clock
s 4 Mbytes address space
s 256 Bytes RAM of Register file (accumulators or
index registers)
s 1024 Bytes of on-chip static RAM
s 8K Bytes of TDSRAM (Teletext and Display
Storage RAM)
s 80-lead QFP package
s 23 fully programmable I/O pins
s Serial Peripheral Interface
s Flexible Clock controller for OSD, Data Slicer
and Core clocks running from one single low
frequency external crystal.
s Enhanced Display Controller with 26 rows of
40/80 characters
– Serial and Parallel attributes
– 10x10 dot Matrix, 512 ROM characters, defin-
able by user
– 4/3 and 16/9 supported in 50/60Hz and 100/
120 Hz mode
– Rounding, fringe, double width, double height,
scrolling, cursor, full background color, half-
intensity color, translucency and half-tone
modes
s Teletext unit, including Data slicer, Acquisition
Unit and 8 Kbytes TDSRAM for Data Storage
s VPS and Wide Screen Signalling slicer
s Integrated Sync Extractor and Sync Controller
s 14-bit Voltage Synthesis for tuning reference
voltage
s Up to 8 External Interrupts plus 1 non-maskable
interrupt
QFP80
s 8 x 8-bit programmable PWM outputs with 5V
open-drain or push-pull capability
s 16-bit Watchdog timer with 8-bit prescaler
s One 16-bit standard timer with 8-bit prescaler
s 4-channel Analog-to-Digital converter; 5-bit
guaranteed
s Rich instruction set and 14-Addressing modes
Versatile Development Tools, including Assem-
bler, Linker, C-compiler, Archiver, Source Level
Debugger and Hardware Emulators with Real-
Time Operating System available from third par-
ties
Device Summary
Device
ST92R195B9
Program
Memory
ROMLESS
TDS
RAM
VPS/
WSS
Package
8K Yes PQFP80
January 2000
Rev. 2.2
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ST92R195B - GENERAL DESCRIPTION
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST92R195B microcontroller is developed and
manufactured by STMicroelectronics using a pro-
prietary n-well HCMOS process. Its performance
derives from the use of a flexible 256-register pro-
gramming model for ultra-fast context switching
and real-time event response. The intelligent on-
chip peripherals offload the ST9 core from I/O and
data management processing tasks allowing criti-
cal application tasks to get the maximum use of
core resources. The ST92R195B MCU supports
low power consumption and low voltage operation
for power-efficient and low-cost embedded sys-
tems.
1.1.1 ST9+ Core
The advanced Core consists of the Central
Processing Unit (CPU), the Register File and the
Interrupt controller.
The general-purpose registers can be used as ac-
cumulators, index registers, or address pointers.
Adjacent register pairs make up 16-bit registers for
addressing or 16-bit processing. Although the ST9
has an 8-bit ALU, the chip handles 16-bit opera-
tions, including arithmetic, loads/stores, and mem-
ory/register and memory/memory exchanges.
Two basic addressable spaces are available: the
Memory space and the Register File, which in-
cludes the control and status registers of the on-
chip peripherals.
1.1.2 Power Saving Modes
To optimize performance versus power consump-
tion, a range of operating modes can be dynami-
cally selected.
Run Mode. This is the full speed execution mode
with CPU and peripherals running at the maximum
clock speed delivered by the Phase Locked Loop
(PLL) of the Clock Control Unit (CCU).
Wait For Interrupt Mode. The Wait For Interrupt
(WFI) instruction suspends program execution un-
til an interrupt request is acknowledged. During
WFI, the CPU clock is halted while the peripheral
and interrupt controller keep running at a frequen-
cy programmable via the CCU. In this mode, the
power consumption of the device can be reduced
by more than 95% (LP WFI).
Halt Mode. When executing the HALT instruction,
and if the Watchdog is not enabled, the CPU and
its peripherals stop operating and the status of the
machine remains frozen (the clock is also
stopped). A reset is necessary to exit from Halt
mode.
1.1.3 I/O Ports
Up to 23 I/O lines are dedicated to digital Input/
Output. These lines are grouped into up to five I/O
Ports and can be configured on a bit basis under
software control to provide timing, status signals,
timer and output, analog inputs, external interrupts
and serial or parallel I/O.
1.1.4 TV Peripherals
A set of on-chip peripherals form a complete sys-
tem for TV set and VCR applications:
– Voltage Synthesis
– VPS/WSS Slicer
– Teletext Slicer
– Teletext Display RAM
– OSD
1.1.5 On Screen Display
The human interface is provided by the On Screen
Display module, this can produce up to 26 lines of
up to 80 characters from a ROM defined 512 char-
acter set. The character resolution is 10x10 dots.
Four character sizes are supported. Serial at-
tributes allow the user to select foreground and
background colours, character size and fringe
background. Parallel attributes can be used to se-
lect additional foreground and background colors
and underline on a character by character basis.
1.1.6 Teletext and Display RAM
The internal 8k Teletext and Display storage RAM
can be used to store Teletext pages as well as Dis-
play parameters.
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ST92R195B - GENERAL DESCRIPTION
INTRODUCTION (Cont’d)
1.1.7 Teletext, VPS and WSS Data Slicers
The three on-board data slicers using a single ex-
ternal crystal are used to extract the Teletext, VPS
and WSS information from the video signal. Hard-
ware Hamming decoding is provided.
1.1.8 Voltage Synthesis Tuning Control
14-bit Voltage Synthesis using the PWM (Pulse
Width Modulation)/BRM (Bit Rate Modulation)
technique can be used to generate tuning voltages
for TV set applications. The tuning voltage is out-
put on one of two separate output pins.
1.1.9 PWM Output
Control of TV settings is able to be made with up to
eight 8-bit PWM outputs, with a frequency maxi-
mum of 23,437Hz at 8-bit resolution (INTCLK = 12
MHz). Low resolutions with higher frequency oper-
ation can be programmed.
1.1.10 Serial Peripheral Interface (SPI)
The SPI bus is used to communicate with external
devices via the SPI, or I C bus communication
standards. The SPI uses a single line for data in-
put and output. A second line is used for a syn-
chronous clock signal.
1.1.11 Standard Timer (STIM)
The ST92R195B has one Standard Timer that in-
cludes a programmable 16-bit down counter and
an associated 8-bit prescaler with Single and Con-
tinuous counting modes.
1.1.12 Analog/Digital Converter (ADC)
In addition there is a 4 channel Analog to Digital
Converter with integral sample and hold, fast
5.75µs conversion time and 6-bit guaranteed reso-
lution.
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ST92R195B - GENERAL DESCRIPTION
Figure 1. ST92R195B Block Diagram
ADDR[15:0]
DAT[7:0]
ASN
RWN
DSN
MMU[5:0]
External
Memory I/F
1 Kbyte
RAM
8 Kbytes
TDSRAM TRI
NMI
INT[7:0]
OSCIN
OSCOUT
RESET
RESETO
SDO/SDI
SCK
MCFM
STO UT
VSO[2:1]
256 bytes
Register File
8/16-bit
CPU
MMU
Interrupt
Management
ST9+ CORE
RCCU
16-BIT
TIMER/
WATCHDOG
SPI
TIMING AND
CLOCK CTRL
STANDARD
TIMER
VOLTAGE
SYNTHESIS
I/O
PORT 0
3 P0[2:0]
I/O
PORT 2
I/O
PORT 3
6 P2[5:0]
4 P3[7:4]
I/O
PORT 4
8 P4[7:0]
I/O
PORT 5
2 P5[1:0]
DATA
SLICER
& ACQUI-
SITIO N
UNIT
SYNC.
EXTRAC-
TION
VPS/WSS
DATA
SLICER
ADC
TXCF
CVBS1
WSCR
WSCF
CVBS2
AIN[4:1]
EXTRG
SYNC
CONTROL
ON
SCREEN
DISPLAY
PWM
D/A CON-
VERTER
VSYNC
HSYNC/CSYNC
CSO
FREQ.
MULTIP.
PXFM
R/G/B/FB
TSLU
HT
PWM[7:0]
All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5
4/18



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ST Microelectronics
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