SMG351AN Datasheet PDF - SeCoS

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SMG351AN
SeCoS

Part Number SMG351AN
Description N-Channel Enhancement Mode Power MosFET
Page 4 Pages


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Elektronische Bauelemente
SMG351AN
3A, 30V,RDS(ON) 60m
N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product
Description
The SMG351AN uses advanced trench technology to
provide excellent on-resistance with low gate change.
The device is suitable for use as a load switch or
in PWM applications.
Features
* Lower Gate Charge
* Small Package Outline
A
L
3
S Top View
21
B
D
G
C
H
Drain
Gate
Source
J
K
D
SC-59
Dim Min Max
A 2.70 3.10
B 1.40 1.60
C 1.00 1.30
D 0.35 0.50
G 1.70 2.10
H 0.00 0.10
J 0.10 0.26
K 0.20 0.60
L 0.85 1.15
S 2.40 2.80
All Dimension in mm
G
S
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current3
Pulsed Drain Current1,2
Total Power Dissipation
Linear Derating Factor
Operating Junction and Storage Temperature Range
Symbol
VDS
VGS
ID @TA=25
IDM
PD @TA=25
Tj, Tstg
Thermal Data
Parameter
Thermal Resistance Junction-ambient3 Max.
Symbol
Rthj-a
Ratings
30
±20
3
10
1.38
0.01
-55 ~ +150
Value
90
Unit
V
V
A
A
W
W/
Unit
/W
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 1 of 4
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Elektronische Bauelemente
SMG351AN
3A, 30V,RDS(ON) 60m
N-Channel Enhancement Mode Power Mos.FET
Electrical Characteristics (Tj = 25 unless otherwise specified)
Parameter
Symbol Min. Typ. Max. Unit
Test Conditions
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature Coefficient
Gate Threshold Voltage
Forward Transconductance
Gate-Source Leakage Current
BVDSS
BVDSS / Tj
VGS(th)
gfs
IGSS
30
-
1.0
-
-
- - V VGS=0, ID=250uA
0.1 - V/ Reference to 25 , ID=1mA
- 2.5 V VDS=VGS, ID=250uA
13 -
S VDS=5V, ID=3.0A
- ±100 nA VGS= ±20V
Drain-Source Leakage Current(Tj=25 )
Drain-Source Leakage Current(Tj=55 )
IDSS
-
-
- 1 uA VDS=30V, VGS=0
- 10 uA VDS=24V, VGS=0
Static Drain-Source On-Resistance RDS(ON)
Total Gate Charge2
Gate-Source Charge
Gate-Drain (“Miller”) Change
Turn-on Delay Time2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Source-Drain Diode
Qg
Qgs
Qgd
Td(on)
Tr
Td(off)
Tf
Ciss
Coss
Crss
Rg
-
-
-
-
-
-
-
-
-
-
-
-
-
- 60 m VGS=10V, ID=3.0A
- 100
VGS=4.5V, ID=2.0A
8.5 -
ID=3A
1.5 - nC VDS=16V
3.2 -
VGS=4.5V
6-
VDS=15V
20 -
ID=3A
20
-
ns VGS=10V
RG=3.3
3-
RD=3
660 -
90 -
70 -
VGS=0V
pF VDS=25V
f=1.0MHz
0.9 -
VGS=15mV, f=1.0MHz
Parameter
Symbol Min. Typ. Max. Unit
Test Conditions
Forward On Voltage2
Reverse Recovery Time2
Reverse Recovery Charge
VSD - - 1.2 V IS=1.2A, VGS=0V
Trr - 14 - ns IS=3A, VGS=0V
Qrr - 7 - nC dI/dt=100A/ s
Notes: 1. Pulse width limited by Max. junction temperature.
2. Pulse width 300us, duty cycle 2%.
3. Surface mounted on 1 in2 copper pad of FR4 board; 270
/W when mounted on Min. copper pad.
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 2 of 4



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Elektronische Bauelemente
Characteristics Curve
5
VGS=10V
4.5V
6.0V
4
SMG351AN
3A, 30V,RDS(ON) 60m
N-Channel Enhancement Mode Power Mos.FET
5
VDS=5V
4
3
3.5V
2
1
3.0V
0
0 0.5 1
1..5 2
VDS Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.215
0.200
ID=3A
0.175
0.150
TA=125
0.125
0.100
0.075
TA=25
0.050
3
4
5 67 8
VGS Gate-to-Source Voltage (V)
9
10
Fig 3. On-Resistance v.s. Gate Voltage
3
2
TA=125
1 25
-55
0
2 2.5 3
3..5 4
VGS Gate-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
3A
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
Fig 5. Forward Characteristics of
Reverse Diode
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
Any changing of specification will not be informed individual
Page 3 of 4



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Elektronische Bauelemente
3A
SMG351AN
3A, 30V,RDS(ON) 60m
N-Channel Enhancement Mode Power Mos.FET
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance
Fig 11. Switching Time Waveform
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Fig 12. Gate Charge Waveform
Any changing of specification will not be informed individual
Page 4 of 4



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