SJ7500P Datasheet PDF - AUK

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SJ7500P
AUK

Part Number SJ7500P
Description Pulse Width Modulation
Page 11 Pages


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Semiconductor
SJ7500/P
Pulse Width Modulation
Description
The SJ7500 is a monolithic integrated circuit which includes all the necessary building
blocks for the design of pulse width modulate(PWM) switching power supplies, including
push-pull, bridge and series configuration. The precision of voltage reference is improved
up to ±1% through trimming and this provides a better output voltage regulation. The
device can operate at switching frequencies between 1KHz and 300KHz and output voltage
up to 23V. The SJ7500 is specified over an operating temperature range of -25~+85.
Features
Package Type
Internal Regulator Provides a Stable 5V
Reference Supply Trimmed to ±1% Accuracy
Uncommitted output transistors capable
of 200mA source or sink
Internal protection from double pulsing of
out-puts with narrow pulse widths or with
supply voltages below specified limits
Easily synchronized to other circuits
Dead time control comparator
Output control selects single-ended or
push-pull operation
Operating temperature range : -25~ +85
Halogen-Free Package is Available
High Level ESD Protection : 400V(MM), 4KV(HBM)
Application
SOP-16
DIP-16
Charger
SMPS
Back Light Inverter
Ordering Information
PKG Type
SJ7500
SJ7500P
Device Name
SOP-16
DIP-16
Marking
SJ7500
SJ7500P
KSD-I7D001-000
1



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Pin Configuration(Top View)
1IN +
1IN -
Feed B ack
D e a d Ti m e C T R L
CT
RT
GND
C1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SJ7500/P
2IN +
2IN -
REF
O utp ut C T R L
VCC
C2
E2
E1
1. Non-INV Input
2. INV Input
3. Feed-Back
4. Dead-Time Control
5. CT
6. RT
7. GND
8. C1
9. E1
10. E2
11. C2
12. Vcc
13 Output Control
14. Ref Out
15. INV-Input
16. Non-INV Input
Block Diagram
V c c 12
R e f O u t 14
G ND 7
RT 6
CT 5
De ad-T i me
Control
4
Non -i n v
Input
In v -In pu t
1
2
Non -i n v
Input
16
In v -In pu t 15
Fe e d-Bac k 3
Reference
Regulator
Osc
De a d T i me
CO MP A R A T O R
+
-
EA1
+
-
EA2
+
-
+
-
PWM
CO MP A R A T O R
13 O u t pu t Con t r ol
T F.F
8 C1
9 E1
11 C2
10 E2
KSD-I7D001-000
2



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Absolute Maximum Ratings
Characteristic
Supply Voltage
Collector Supply Voltage
Output Current
Amplifier Input Voltage
Power Dissipation
SOP-16
DIP-16
Operating Temperature
Storage Temperature
Symbol
VCC
VC
Io
Vin
PD
PD
Topr
Tstg
Recommended Operating Condition
Characteristic
Symbol
Supply Voltage
Collector Output Voltage
VCC
VC1, VC2
Collector Output Current
IC1, IC2
Amplifier Input Voltage
Vin
Current Into Feedback Terminal
Ifb
Reference Output Current
Iref
Timing Resistor
Timing Capacitor
Oscillator Frequency
Rt
Ct
fOSC
PWM Input Voltage (Pin 3, 4, 13)
-
Ratings
23
23
250
Vcc+0.3
1500
1700
-25 ~ +85
-65 ~ +150
SJ7500/P
Ta=25°C
Unit
V
V
mA
V
mW
mW
°C
°C
Min.
7
-
-
-0.3
-
-
1.8
0.0047
1
0.3
Max.
20
20
200
Vcc-2
0.3
10
500
10
300
5.3
Unit
V
V
mA
V
mA
mA
KHz
V
Reference Section
Characteristic
Output Reference Voltage
Line Regulation
Load Regulation
Short Circuit Current
Symbol
Vref
Test Condition
Iref = 1.0mA, Ta=25
Iref = 1.0mA, Ta=-25~85
VLINE
VLOAD
Isc
7V < Vcc < 20V
1mA< IREF <10mA
Vref=0V
Min.
4.95
4.9
-
-
10
Typ.
5.00
5.0
2
1
35
Max.
5.05
5.1
25
15
50
Unit
V
mV
mV
mA
Oscillator Section
Characteristic
Oscillation Frequency
Oscillation Frequency
Change With Temperature
Symbol
fOSC
Δ fSOC/T
Test Condition
Ct=0.001 , Rt=30
Ct=0.01 , Rt=12 , Ta=25
Ct=0.01 , Rt=12 , Ta=25~85
Ct=0.01 , Rt=12 , Ta=25~85
Min.
-
9.2
9
Typ.
40
10
-
Max.
-
10.8
12
-- 2
Unit
%
KSD-I7D001-000
3



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Dead Time Control Section
Characteristic
Symbol
Test Condition
Input Bias Current (Pin4)
Max. Duty cycle
IIB(DT)
D(Max)
Vcc = 15V, 0V < V4 < 5.25V
Vcc = 15V, Pin4 = 0V,
Output Control Pin = Vref
Input Threshold
Voltage
Zero Duty
Max Duty
VTH -
SJ7500/P
Min. Typ. Max.
- -2 -10
45 -
-
- 2.8 3.3
0-
-
Unit
%
V
Error Amplifier Section
Characteristic
Input Offset Voltage
Input Offset Current
Input Bias Current
Common Mode
Input voltage Range
Large Signal Open Loop
Voltage Range
Unity Gain Band width
Open Loop Voltage Gain
Output Sink Current
Common Mode Rejection Ratio
Output Source Current
Symbol
Test Condition
VIOS
IIOS
IIB
V3 = 2.5V
V3 = 2.5V
V3 = 2.5V
VICR
7V VCC 20V
GVO
GBW
GVO
Isink
CMRR
Isource
0.5V V3 3.5V
-
0.5V Vo 3.5V
-15mV Vid -5V , V3=0.7V
-
15mV Vid 5V , V3=3.5V
Min.
-
-
-
Typ.
2
25
0.2
Max.
10
250
1
Unit
mV
nA
-0.3 - VCC-2 V
60
-
70
-0.3
65
2
74
650
95
-0.7
80
-
-
-
-
-
-
-
dB
dB
mA
dB
mA
PWM Comparator Section (Pin3)
Characteristic
Symbol
Test Condition
Input Threshold Voltage
Input Sink Current
VITH
Io-
Zero duty cycle
V3=0.7V
Min.
-
-0.3
Typ.
4
-0.7
Max.
4.5
-
Unit
V
mA
Output Section
Characteristic
Output Satur- Common-Emitter
ation Voltage Emitter-Follower
Collector off-state Current
Emitter off-state Current
Total Device
Standby power Supply
Current
Symbol
Test Condition
VCE(SAT)
VE= 0V, IC = 200mA
VCC =15V, IE = -200mA
IC(off)
VCC = VCE = 20V, VE = 0
IE(off)
VCC = VC = 20V, VE = 0
ICC Pin6=Vref, Vcc=15V
Output Switching Characteristic
Characteristic
Symbol
Rise Time
Common Emitter
Emitter Follower
tr -
Fall Time
Common Emitter
Emitter Follower
tf
-
Test Condition
Min.
-
-
-
-
Typ.
1.1
1.5
2
-
Max.
1.3
2.5
100
-100
Unit
V
- 3.5 10 mA
Min.
-
-
-
-
Typ.
100
100
25
25
Max.
200
200
100
100
Unit
ns
KSD-I7D001-000
4



SJ7500P datasheet pdf
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