SIC769ACD Datasheet PDF - Vishay Siliconix


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SIC769ACD
Vishay Siliconix

Part Number SIC769ACD
Description Integrated DrMOS Power Stage
Page 19 Pages

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Integrated DrMOS Power Stage
SiC769ACD
Vishay Siliconix
DESCRIPTION
The SiC769ACD is an integrated solution that contains PWM
optimized n-channel MOSFETs (high side and low side) and
a full featured MOSFET driver IC. The device complies with
the Intel DrMOS standard for desktop and server Vcore power
stages. The SiC769ACD delivers up to 35 A continuous
output current and operates from an input voltage range of
3 V to 16 V. The integrated MOSFETs are optimized for
output voltages in the ranges of 0.8 V to 2.0 V with a nominal
input voltage of 12 V. The device can also deliver very high
power at 5 V output for ASIC applications.
The SiC769ACD incorporates an advanced MOSFET gate
driver IC. This IC accepts a single PWM input from the VR
controller and converts it into the high side and low side
MOSFET gate drive signals. The driver IC is designed to
implement the skip mode (SMOD) function for light load
efficiency improvement. Adaptive dead time control also
works to improve efficiency at all load points. The
SiC769ACD has a thermal warning (THDN) that alerts the
system of excessive junction temperature. The driver IC
includes an enable pin, UVLO and shoot through protection.
The SiC769ACD is optimized for high frequency buck
applications. Operating frequencies in excess of 1 MHz can
easily be achieved.
The SiC769ACD is packaged in Vishay Siliconix high
performance PowerPAK MLP6 x 6 package. Compact
co-packaging of components helps to reduce stray
inductance, and hence increases efficiency.
SiC769ACD APPLICATION DIAGRAMM
FEATURES
• Integrated Gen III MOSFETs and DrMOS
compliant gate driver IC
• Enables Vcore switching at 1 MHz
• Easily achieve > 90 % efficiency in multi-phase,
low output voltage solutions
• Low ringing on the VSWH pin reduces EMI
• Pin compatible with DrMOS 6 x 6 version 3.0
• Tri-state PWM input function prevents negative output
voltage swing
• 3.3 V logic levels on PWM
• MOSFET threshold voltage optimized for 5 V driver bias
supply
• Automatic skip mode operation (SMOD) for light load
efficiency
• Under-voltage lockout
• Built-in bootstrap Schottky diode
• Adaptive deadtime and shoot through protection
• Thermal shutdown warning flag
• Low profile, thermally enhanced PowerPAK® MLP 6 x 6
40 pin package
• Halogen-free according to IEC 61249-2-21 definition
Compliant to RoHS directive 2002/95/EC
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APPLICATIONS
• CPU and GPU core voltage regulation
• Server, computer, workstation, game console, graphics
boards, PC
5 V VIN
VCIN
SMOD
DSBL#
PWM
THDN
SiC769ACD
BOOT
VSWH
PHASE
VO
Document Number: 65708
S10-0113-Rev. B, 18-Jan-10
Figure 1
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SiC769ACD
Vishay Siliconix
ORDERING INFORMATION
Part Number
SiC769ACD-T1-GE3
SiC769ADB
Package
PowerPAK MLP66-40
Reference board
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Min.
Input Voltage
VIN - 0.3
Switch Node Voltage (DC)
VSW
- 0.3
Drive Input Voltage
VDRV
- 0.3
Control Input Voltage
VCIN
- 0.3
Logic Pins
VPWM, VDSBL#,
VTHDN, VSMOD
- 0.3
Boot Voltage DC (referenced to CGND)
Boot Voltage < 200 ns Transient (referenced to CGND)
- 0.3
VBS
- 0.3
Boot to Phase Voltage DC
Boot to Phase Voltage < 200 ns
VBS_PH
- 0.3
- 0.3
Ambient Temperature Range
TA - 40
Maximum Junction Temperature
TJ
Storage Junction Temperature
TSTG
- 65
Soldering Peak Temperature
Note:
a.
TA
=
25
°C
and
all
voltages
referenced
to
PGND
=
CGND
unless
otherwise noted.
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Max.
20
20
7.0
7.0
VCIN + 0.3
27
29
7
9
125
150
150
260
Unit
V
°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min.
Typ.
Max.
Unit
Input Voltage
VIN 3.0 12 16
Control Input Voltage
Drive Input Voltage
VCIN
VDRV
4.5
4.5
5.5
V
5.5
Switch Node
VSW_DC
12 16
Note:
a. Recommended operating conditions are specified over the entire temperature range, and all voltages referenced to PGND = CGND unless
otherwise noted.
THERMAL RESISTANCE RATINGS
Parameter
Maximum Power Dissipation at TPCB = 25 °C
Maximum Power Dissipation at TPCB = 100 °C
Thermal Resistance from Junction to Top
Thermal Resistance from Junction to PCB
Symbol
PD_25C
PD_100C
Rth_J_TOP
Rth_J_PCB
Typ.
Max.
25
10
15
5
Unit
W
°C/W
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Document Number: 65708
S10-0113-Rev. B, 18-Jan-10
Datasheet pdf - http://www.DataSheet4U.co.kr/



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SiC769ACD
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
Parameter
Power Supplies
Symbol
Test Conditions Unless Specified
VDSBL# = VSMOD = 5 V,
VIN = 12 V, VVDRV = VVCIN = 5 V,
TA = 25 °C
VCIN Control Input Current
Drive Input Current (Dynamic)
Bootstrap Supply
IVCIN
IVDRV
VDSBL# = 0 V, no switching
VDSBL# = 5 V, no switching
VDSBL# = 5 V, fs = 300 kHz, D = 0.1
fs = 300 kHz, D = 0.1
fs = 1000 kHz, D = 0.1
Bootstrap Switch Forward Voltage
Control Inputs (PWM, DSBL#, SMOD)
VBS Diode
VVCIN = 5 V, forward bias current 2 mA
PWM Rising Threshold
PWM Falling Threshold
PWM Tristate Rising Threshold
PWM Tristate Falling Threshold
PWM Tristate Rising Threshold Hysteresis
PWM Tristate Falling Threshold Hysteresis
Tristate Hold-Off Timeb
Vth_pwm_r
Vth_pwm_f
Vth_tri_r
Vth_tri_f
Vhys_tri_r
Vhys_tri_f
tTSHO
PWM Input Current
IPWM
SMOD, DSBL# Logic Input Voltage
Pull Down Impedance
THDN Output Low
Protection
VLOGIC_LH
VLOGIC_LH
RTHDN
VTHDNL
VPWM = 3.3 V
VPWM = 0 V
Rising (low to high)
Falling (high to low)
5 kΩ resistor pull-up to VCIN
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Thermal Warning Flag Set
Thermal Warning Flag Clear
Thermal Warning Flag Hysteresis
Under Voltage Lockout (VCIN)
Under Voltage Lockout (VCIN)
VUVLO
Rising, on threshold
Falling, off threshold
Under Voltage Lockout Hysteresis (VCIN)
High Side Gate Discharge Resistorb
VUVLO_HYST
RHS_DSCRG
VVDRV = VVCIN = 0 V; VIN = 12 V
Notes:
a. Typical limits are established by characterization and are not production tested.
b. Guaranteed by design.
Min. Typ.a Max. Unit
20
400 µA
600
14 18
mA
40 54
0.60 0.75 V
1.8 2 2.3
0.8 1.0 1.2
0.9 1.3 1.8
1.6 1.8
2
220
240
150
22
- 17
2.0
0.8
40
0.04
V
mV
ns
µA
V
Ω
V
150
135
15
3.3 3.9
2.5 2.9
400
20.2
°C
V
mV
kΩ
MOSFET SPECIFICATIONS
Parameter
High Side
Low Side
Symbol
VDS
RDS(on)_H
VDS
RDS(on)_L
Test Conditions Unless Specified
VVCIN = VDSBL# = 5 V,
VVIN = 12 V, TA = 25 °C
VGS = 0 V, IDS = 250 µA
VGH = 5 V, resistance measured
at package pins
VGS = 0 V, IDS = 250 µA
VGL = 5 V, resistance measured
at package pins
Note:
a. Typical MOSFET parameters are provided as a design guide.
Min. Typ.a Max.
20
6.0
20
1.7
Unit
V
mΩ
V
mΩ
Document Number: 65708
S10-0113-Rev. B, 18-Jan-10
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SiC769ACD
Vishay Siliconix
TIMING SPECIFICATIONS
Parameter
Symbol
Turn Off Propagation Delay
High Sidea
td_off_HS
Rise Time High Side
Fall Time High Side
Turn Off Propagation Delay
Low Sidea
tr_HS
tf_HS
td_off_LS
Rise Time Low Side
Fall Time Low Side
Dead Time Rising
Dead Time Falling
tr_LS
tf_LS
tdead_on
tdead_off
Note:
a. Min. and Max. are not 100 % production tested.
Test Conditions Unless Specified
VVDRV = VVCIN = VDSBL# = 5 V,
VVIN = 12 V, TA = 25 °C
25 % of PWM to 90 % of GH
10 % to 90 % of GH
90 % to 10 % of GH
75 % of PWM to 90 % of GL
10 % to 90 % of GL
90 % to 10 % of GL
10 % of GL to 10 % of GH
10 % of GH to 10 % of GL
Min.
10
10
Typ.
20
8
8
20
8
8
15
15
Max.
30
30
Unit
ns
TIMING DEFINITIONS
PWM 75 %
GH
90 %
GL
10 %
SW
25 %
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90 %
10 %
1 234
56 7 8
Region
Definition
1 Turn off propagation delay LS
2 Fall time LS
3 Dead time rising
4 Rise time HS
5 Turn off propagation delay HS
6 Fall time HS
7 Dead time falling
8 Rise time LS
Note:
GH is referenced to the high side source. GL is referenced to the low side source.
Symbol
td_off_LS
tf_LS
tdead_on
tr_HS
td_off_HS
tf_HS
tdead_off
tr_LS
www.vishay.com
4
Document Number: 65708
S10-0113-Rev. B, 18-Jan-10
Datasheet pdf - http://www.DataSheet4U.co.kr/




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