PMDPB85UPE Datasheet PDF - NXP Semiconductors

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PMDPB85UPE
NXP Semiconductors

Part Number PMDPB85UPE
Description 20V dual P-channel Trench MOSFET
Page 15 Pages


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PMDPB85UPE
20 V dual P-channel Trench MOSFET
Rev. 1 — 20 June 2012
Product data sheet
1. Product profile
1.1 General description
Dual small-signal P-channel enhancement mode Field-Effect Transistor (FET) in a
leadless medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic
package using Trench MOSFET technology.
1.2 Features and benefits
Low threshold voltage
Very fast switching
Trench MOSFET technology
2 kV ElectroStatic Discharge (ESD)
protection
1.3 Applications
Relay driver
High-speed line driver
High-side load switch
Switching circuits
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min Typ Max Unit
Per transistor
VDS drain-source voltage
VGS gate-source voltage
ID drain current
Static characteristics (per transistor)
Tj = 25 °C
VGS = -4.5 V; Tamb = 25 °C; t 5 s
--
-8 -
[1] -
-
-20 V
8V
-3.7 A
RDSon
drain-source on-state VGS = -4.5 V; ID = -1.3 A; Tj = 25 °C
resistance
- 82 103 m
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2.



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NXP Semiconductors
PMDPB85UPE
20 V dual P-channel Trench MOSFET
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
8
Pinning information
Symbol Description
S1 source TR1
G1 gate TR1
D2 drain TR2
S2 source TR2
G2 gate TR2
D1 drain TR1
D1 drain TR1
D2 drain TR2
3. Ordering information
Simplified outline
654
Graphic symbol
D1
D2
78
123
Transparent top view
DFN2020-6 (SOT1118)
G1
G2
S1 S2
017aaa260
Table 3. Ordering information
Type number
Package
Name
PMDPB85UPE
DFN2020-6
Description
plastic thermal enhanced ultra thin small outline package;
no leads; 6 terminals
4. Marking
Version
SOT1118
Table 4. Marking codes
Type number
PMDPB85UPE
5. Limiting values
Marking code
2C
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Per transistor
VDS drain-source voltage Tj = 25 °C
VGS gate-source voltage
ID drain current
VGS = -4.5 V; Tamb = 25 °C; t 5 s
VGS = -4.5 V; Tamb = 25 °C
VGS = -4.5 V; Tamb = 100 °C
IDM peak drain current
Tamb = 25 °C; single pulse; tp 10 µs
Ptot
total power dissipation
Tamb = 25 °C
Source-drain diode
IS source current
PMDPB85UPE
Product data sheet
Tsp = 25 °C
Tamb = 25 °C
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 June 2012
[1]
[1]
[1]
[2]
[1]
[1]
Min Max Unit
- -20 V
-8 8
V
- -3.7 A
- -2.9 A
- -1.8 A
- -11.6 A
- 515 mW
- 1170 mW
- 8330 mW
- -1.2 A
© NXP B.V. 2012. All rights reserved.
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NXP Semiconductors
PMDPB85UPE
20 V dual P-channel Trench MOSFET
Table 5. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
ESD maximum rating
VESD
electrostatic discharge voltage
Per device
HBM; C = 100 pF; R = 1.5 k
Tj
Tamb
Tstg
junction temperature
ambient temperature
storage temperature
Min Max Unit
[3] -
2000 V
-55 150 °C
-55 150 °C
-65 150 °C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2.
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
[3] Measured between all pins.
120
Pder
(%)
80
017aaa123
120
Ider
(%)
80
017aaa124
40 40
0
75 25
25
75 125 175
Tj (°C)
0
75 25
25
75 125 175
Tj (°C)
Fig 1. Normalized total power dissipation as a
function of junction temperature
Fig 2. Normalized continuous drain current as a
function of junction temperature
PMDPB85UPE
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 June 2012
© NXP B.V. 2012. All rights reserved.
3 of 15



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NXP Semiconductors
PMDPB85UPE
20 V dual P-channel Trench MOSFET
-102
ID
(A)
-10
Limit RDSon = VDS/ID
aaa-003928
tp = 100 μs
-1
-10-1
DC; Tsp = 25 °C
DC; Tamb = 25 °C;
drain mounting pad 6 cm2
tp = 1 ms
tp = 10 ms
tp = 100 ms
-10-2
-10-1
-1
-10 -102
VDS (V)
IDM = single pulse
Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source
voltage
6. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Per transistor
Rth(j-a)
thermal resistance
from junction to
ambient
Rth(j-sp)
thermal resistance
from junction to solder
point
Conditions
in free air
in free air; t 5 s
Min Typ Max Unit
[1] -
[2] -
[2] -
-
211 243 K/W
93 107 K/W
55 64 K/W
12 15 K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm2.
PMDPB85UPE
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 June 2012
© NXP B.V. 2012. All rights reserved.
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