NUC710ADN Datasheet PDF - nuvoton

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NUC710ADN
nuvoton

Part Number NUC710ADN
Description 16/32-bit ARM microcontroller
Page 30 Pages


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NUC710ADN
32-BIT ARM7TDMI-BASED MCU
NUC710ADN
16/32-bit ARM microcontroller
Product Data Sheet



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NUC710ADN
Table of Contents-
1. GENERAL DESCRIPTION ..........................................................................................................1
2. FEATURES..................................................................................................................................2
3. PIN DIAGRAM .............................................................................................................................8
4. PIN ASSIGNMENTS....................................................................................................................9
5. PIN DESCRIPTIONS .................................................................................................................15
6. FUNCTIONAL DESCRIPTION ..................................................................................................28
6.1 ARM7TDMI CPU CORE................................................................................................ 28
6.2 System Manager ........................................................................................................... 29
6.2.1 Overview ...................................................................................................................... 29
6.2.2 System Memory Map ................................................................................................... 29
6.2.3 Address Bus Generation.............................................................................................. 32
6.2.4 Data Bus Connection with External Memory................................................................ 32
6.2.5 Bus Arbitration ............................................................................................................. 41
6.2.6 Power management ..................................................................................................... 42
6.2.7 Power-On Setting......................................................................................................... 44
6.2.8 System Manager Control Registers Map ..................................................................... 45
6.3 External Bus Interface ................................................................................................... 58
6.3.1
6.3.2
6.3.3
EBI Overview ............................................................................................................... 58
SDRAM Controller........................................................................................................ 58
EBI Control Registers Map........................................................................................... 62
6.4 Cache Controller............................................................................................................ 80
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
On-Chip RAM............................................................................................................... 80
Non-Cacheable Area ................................................................................................... 80
Instruction Cache ......................................................................................................... 81
Data Cache .................................................................................................................. 83
Write Buffer.................................................................................................................. 85
Cache Control Registers Map ...................................................................................... 85
6.5 Ethernet MAC Controller ............................................................................................... 91
6.5.1
6.5.2
EMC Functional Description......................................................................................... 91
EMC Register Mapping .............................................................................................. 101
6.6 GDMA Controller ......................................................................................................... 150
6.6.1
6.6.2
GDMA Functional Description.................................................................................... 150
GDMA Register Map .................................................................................................. 151
6.7 USB Host Controller .................................................................................................... 159
6.7.1 USB Host Functional Description............................................................................... 159
6.7.2 USB Host Controller Registers Map........................................................................... 160
6.7.3 HCCA ......................................................................................................................... 181
6.7.4 Endpoint Descriptor ................................................................................................... 181
6.7.5 Transfer Descriptor .................................................................................................... 181
6.8 USB Device Controller................................................................................................. 181
Publication Release Date: November23, 2013
- I - Revision A10



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NUC710ADN
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.8.1 USB Endpoints........................................................................................................... 182
6.8.2 Standard device request ............................................................................................ 182
6.8.3 USB Device Register Description .............................................................................. 182
SD Host Controller....................................................................................................... 218
6.9.1 Functional Description ............................................................................................... 218
6.9.2 Register Mapping ....................................................................................................... 220
6.9.3 SD Register Description............................................................................................. 221
LCD Controller ............................................................................................................. 235
6.10.1 Main Features ............................................................................................................ 235
6.10.2 LCD Register MAP..................................................................................................... 236
6.10.3 LCD Special Register Description.............................................................................. 238
Audio Controller ........................................................................................................... 289
6.11.1 IIS Interface................................................................................................................ 289
6.11.2 AC97 Interface ........................................................................................................... 290
6.11.3 Audio Controller Register Map ................................................................................... 293
Universal Asynchronous Receiver/Transmitter Controller........................................... 311
6.12.1 UART0 ....................................................................................................................... 313
6.12.2 UART1 ....................................................................................................................... 313
6.12.3 UART2 ....................................................................................................................... 315
6.12.4 UART3 ....................................................................................................................... 317
6.12.5 General UART Controller ........................................................................................... 318
6.12.6 High speed UART Controller...................................................................................... 331
Timer/Watchdog Controller ......................................................................................... 345
6.13.1 General Timer Controller............................................................................................ 345
6.13.2 Watchdog Timer ........................................................................................................ 345
6.13.3 Timer Control Registers Map ..................................................................................... 345
Advanced Interrupt Controller...................................................................................... 353
6.14.1 Interrupt Sources ....................................................................................................... 354
6.14.2 AIC Registers Map ..................................................................................................... 357
General-Purpose Input/Output .................................................................................... 369
6.15.1 GPIO Control Registers Map ..................................................................................... 372
6.15.2 GPIO Register Description......................................................................................... 373
Real Time Clock .......................................................................................................... 404
6.16.1 RTC Register Map ..................................................................................................... 405
6.16.2 RTC Application Note................................................................................................. 417
Smart Card Host Interface........................................................................................... 418
6.17.1 Register Mapping ....................................................................................................... 418
6.17.2 Register Description................................................................................................... 420
6.17.3 Functional description ................................................................................................ 445
I2C Interface................................................................................................................. 448
6.18.1 I2C Protocol ................................................................................................................ 449
6.18.2 I2C Serial Interface Control Registers Map................................................................ 452
Publication Release Date: November235, 2013
- II - Revision A10



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NUC710ADN
6.19 Universal Serial Interface ............................................................................................ 458
6.19.1 USI Timing Diagram................................................................................................... 458
6.19.2 USI Registers Map ..................................................................................................... 459
6.20
PWM............................................................................................................................ 466
6.20.1 PWM double buffering and automatic reload............................................................. 466
6.20.2 Modulate Duty Ratio................................................................................................... 467
6.20.3 Dead Zone Generator ................................................................................................ 467
6.20.4 PWM Timer Start procedure ...................................................................................... 468
6.20.5 PWM Timer Stop procedure ...................................................................................... 468
6.20.6 PWM Register Map.................................................................................................... 469
6.21
Keypad Interface.......................................................................................................... 476
6.21.1 Keypad Interface Register Map.................................................................................. 477
6.21.2 Register Description................................................................................................... 478
6.22 PS2 Host Interface Controller...................................................................................... 485
6.22.1 PS2 Host Controller Interface Register Map .............................................................. 486
6.22.2 Register Description................................................................................................... 486
7. ELECTRICAL SPECIFICATIONS............................................................................................490
7.1 Absolute Maximum Ratings......................................................................................... 490
7.2 DC Specifications ........................................................................................................ 490
7.2.1
7.2.2
Digital DC Characteristics .......................................................................................... 490
USB Transceiver DC Characteristics ......................................................................... 493
7.3 AC Specifications ........................................................................................................ 493
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10
7.3.11
EBI/SDRAM Interface AC Characteristics.................................................................. 493
EBI/(ROM/SRAM/External I/O) AC Characteristics.................................................... 494
USB Transceiver AC Characteristics ......................................................................... 495
EMC RMII AC Characteristics .................................................................................... 496
LCD Interface AC Characteristics .............................................................................. 498
SD Interface AC Characteristics ................................................................................ 499
AC97/I2S Interface AC Characteristics ...................................................................... 500
Smart Card Interface AC Characteristics ................................................................... 502
I2C Interface AC Characteristics................................................................................ 503
USI Interface AC Characteristics ............................................................................... 504
PS2 Interface AC Characteristics .............................................................................. 505
8. ORDERING INFORMATION ...................................................................................................506
9. PACKAGE SPECIFICATIONS.................................................................................................507
10. APPENDIX A: NUC710 REGISTERS MAPPING TABLE........................................................508
11. REVISION HISTORY...............................................................................................................528
- III -
Publication Release Date: November23, 2013
Revision A10



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