MCP19214 Datasheet PDF - Microchip

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MCP19214
Microchip

Part Number MCP19214
Description Low-Side PWM Controller
Page 30 Pages


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MCP19214/5
Digitally Enhanced Power Analog, Dual Channel, Low-Side PWM
Controller
Features
• AEC Q100 Qualified and PPAP Capable
• Input Voltage Range: 4.5V-42V
• Two Independent High-Performance PWM
Controllers
• Two Independent Control Loops per Channel
allowing the User to Simultaneously Control the
Output Voltage and Current
• Can Be Configured to Control Multiple Topologies
including but Not Limited To:
- Boost
- Flyback
- Ćuk
- Single-Ended Primary-Inductor Converter
(SEPIC)
• Peak Current Mode Control
• Master/Slave Operation of the PWM Controllers
with Adjustable Phase Shift
• Differential Output Current Sense Capability
• Integrated Low-Side Current Sense Differential
Amplifier (10X)
• Integrated Low-Side Gate Drivers:
- 0.5A Sink/Source Current Capability at 5V
Supply Voltage
- 1A Sink/Source Current Capability at 10V
Supply Voltage
• Special Events Generator (the state of regulating
loops can be monitored without firmware
overhead)
• Configurable Parameters:
- Reference Voltages for Regulating Loops
(four internal DACs)
- Input Undervoltage Lockout (UVLO)
- Input Overvoltage Lockout (OVLO)
- Primary Current Leading Edge Blanking:
0 ns, 50 ns, 100 ns and 200 ns
- Fixed Switching Frequency Range:
31.25 kHz-2.0 MHz
- Slope Compensation
- Primary Current Sense Offset Adjustment
- Configurable GPIO Pin Options
• Low Quiescent Current: 10 mA Typical
• Low Sleep Current: 120 µA Typical
• Thermal Shutdown
Microcontroller Features
• Precision 8 MHz Internal Oscillator Block:
- Factory-Calibrated to ±1%, Typical
• Interrupt-Capable
- Firmware
- Interrupt-on-Change Pins
• Only 35 Instructions to Learn
• 8192 Words On-Chip Program Memory
• 336 bytes of Internal RAM
• High-Endurance Flash:
- 100,000 Write Flash Endurance
- Flash Retention: > 40 Years
• Watchdog Timer (WDT) with Independent
Oscillator for Reliable Operation
• Programmable Code Protection
• In-Circuit Serial Programming™ (ICSP™) via Two
Pins
• Up to 12 I/O Pins and One Input-Only Pin
• Analog-to-Digital Converter (ADC):
- 10-Bit Resolution
- Internal 4096 mV Precision Reference
Generator
- Up to 8 External Channels
• Timer0: 8-Bit Timer/Counter with 8-Bit Prescaler
• Enhanced Timer1:
- 16-bit Timer with Prescaler
- Two Selectable Clock Sources
• Timer2: 8-Bit Timer with Prescaler
- 8-Bit Period Register
• I2C Communication:
- 7-bit Address Masking
- Two Dedicated Address Registers
• Addressable Universal Synchronous
Asynchronous Receiver Transmitter (AUSART)
(only MCP19215):
- 8 and 9-Bit Data Operations
- Address Detect
- Asynchronous and Synchronous Operating
Modes
2017 Microchip Technology Inc.
DS20005681A-page 1



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MCP19214/5
Pin Diagram – 28-Pin 5x5 QFN (MCP19214)
MCP19214
5x5 QFN*
GPA0/AN0/TS_OUT1
1
GPA1/AN1 2
GPA2/AN2/T0CKI/INT 3
GPB4/AN5/CCD2/ICSPDAT 4
GPA3/AN3/TS_OUT2 5
GPA7/SCL 6
GPB0/SDA 7
EXP-29
MCP19214
21 VIN
20 VDD
19 VDR
18 PDRV1
17 PGND
16 PDRV2
15 IP2
* Includes Exposed Thermal Pad (EP); see Table 1.
DS20005681A-page 2
2017 Microchip Technology Inc.



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TABLE 1: 28-PIN QFN (MCP19214) SUMMARY
MCP19214/5
Additional
GPA0 1 Y AN0 — — — IOC
Y
— Analog Circuitry Debug Out(1)
GPA1 2 Y AN1 — — — IOC
Y
——
GPA2 3 Y AN2 T0CKI — —
IOC
INT
Y
——
GPB4
GPA3
4 Y AN5
5 Y AN3
——
——
IOC
IOC
Y
Y
— Dual Capture/Compare Input 2
Digital Circuitry Debug Out(1)
GPA7 6 N —
— SCL — IOC
Y ICSPDAT —
GPB0
GPA5
7N
8N
— SDA — IOC
Y
— — — IOC(2) Y(3)
MCLR Test Enable Input
GPA6 9 N — — — — IOC
Y
— Dual Capture/Compare Input 1
ISN2 10 — — — — — —
— Current Sense Amplifier Negative
Input for PWM Channel 2
ISP2 11 — — — — — —
— Current Sense Amplifier Positive
Input for PWM Channel 2
CCOMP2 12 — — — — — —
— The Output of the Error Amplifier of
the Current Loop of PWM Channel 2
VCOMP2 13 — — — — — —
— The Output of the Error Amplifier of
the Voltage Loop of PWM Channel 2
VFB2 14 — — — — — —
— Feedback Input of the Voltage Loop
of PWM Channel 2
IP2 15 — — — — — —
— Primary Input Current Sense
of PWM Channel 2
PDRV2 16 — — — — — —
— Gate Drive Output of PWM Channel 2
PGND 17 — — — — — —
PDRV1 18 — — — — — —
— Power Ground
— Gate Drive Output of PWM Channel 1
VDR 19 — — — — — —
VDD 20 — — — — — —
VIN 21 — — — — — —
IP1 22 — — — — — —
— Gate Drive Supply Voltage
— VDD Output (+5V)
— Input Supply Voltage
— Primary Input Current Sense
of PWM Channel 1
VFB1 23 — — — — — —
— Feedback Input of the Voltage Loop
of PWM Channel 1
VCOMP1 24 — — — — — —
— The Output of the Error Amplifier of
the Voltage Loop of PWM Channel 1
CCOMP1 25 — — — — — —
— The Output of the Error Amplifier of
the Current Loop of PWM Channel 1
ISP1 26 — — — — — —
— Current Sense Amplifier Positive
Input for PWM Channel 1
ISN1 27 — — — — — —
— Current Sense Amplifier Negative
Input for PWM Channel 1
GPB5 28 Y AN6 —
— IOC
Y ICSPCLK —
EP 29 — — — —
— — AGND Small Signal Ground and Digital
Ground
Note 1: The Analog/Digital Debug Output is selected through the control of the ABECON1 register.
2: The IOC is disabled when MCLR is enabled.
3: Weak pull-up always enabled when MCLR is enabled, otherwise the pull-up is under user control.
2017 Microchip Technology Inc.
DS20005681A-page 3



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MCP19214/5
Pin Diagram – 32-PIN 5X5 QFN (MCP19215)
MCP19215
5x5 QFN*
32 31 30 29 28 27 26 25
GPA0/AN0/TS_OUT1 1
24 IP1
GPA1/AN1 2
23 VIN
GPA2/AN2/T0CKI/INT 3
22 VDD
GPB4/AN5/ICSPDAT 4
GPA3/AN3/TS_OUT2 5
MCP19215
21 VDR
20 PDRV1
GPA7/SCL 6
19 PGND
GPB0/SDA 7
GPA5/MCLR 8
EXP-33
18 PDRV2
17 IP2
9 10 11 12 13 14 15 16
* Includes Exposed Thermal Pad (EP); see Table 2.
DS20005681A-page 4
2017 Microchip Technology Inc.



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