MC74VHCT138A Datasheet PDF - Motorola

www.Datasheet-PDF.com

MC74VHCT138A
Motorola

Part Number MC74VHCT138A
Description 3-to-8 Line Decoder
Page 6 Pages


MC74VHCT138A datasheet pdf
Download PDF
MC74VHCT138A pdf
View PDF for Mobile


No Preview Available !

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3-to-8 Line Decoder
The MC74VHCT138A is an advanced high speed CMOS 3–to–8 decoder
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
When the device is enabled, three Binary Select inputs (A0 – A2)
determine which one of the outputs (Y0 – Y7) will go Low. When enable input
E3 is held Low or either E2 or E1 is held High, decoding function is inhibited
and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade
connection and for use as an address decoder for memory systems.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because they have full 5V
CMOS level output swings.
The VHCT138A input structures provide protection when voltages
between 0V and 5.5V are applied, regardless of the supply voltage. The
output structures also provide protection when VCC = 0V. These input and
output structures help prevent device destruction caused by supply voltage
– input/output voltage mismatch, battery backup, hot insertion, etc.
High Speed: tPD = 7.6ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5V to 5.5V Operating Range
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 122 FETs or 30.5 Equivalent Gates
MC74VHCT138A
D SUFFIX
16–LEAD SOIC PACKAGE
CASE 751B–05
DT SUFFIX
16–LEAD TSSOP PACKAGE
CASE 948F–01
M SUFFIX
16–LEAD SOIC EIAJ PACKAGE
CASE 966–01
ORDERING INFORMATION
MC74VHCTXXXAD SOIC
MC74VHCTXXXADT TSSOP
MC74VHCTXXXAM SOIC EIAJ
PIN ASSIGNMENT
A0 1
A1 2
A2 3
E1 4
E2 5
E3 6
Y7 7
GND 8
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
FUNCTION TABLE
Inputs
Outputs
E3 E2 E1 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H XXX HHH HHHH H
X H X XXX HHH HHHH H
L X X XXX HHH HHHH H
H L L LLL LHHHHHHH
H L L LLHH L HHHHHH
H L L LHL HH L HHHHH
H L L LHH H H H L H H H H
H L L HLL HHHH L HHH
H L L HLHHHHHH L HH
H L L HHL H H H H H H L H
H L L HHH H H H H H H H L
H = high level (steady state); L = low level (steady state); X = don’t care
SELECT
INPUTS
ENABLE
INPUTS
A0 1
A1 2
A2 3
E3 6
5
E2
E1 4
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10
Y5
9 Y6
7
Y7
ACTIVE–LOW
OUTPUTS
LOGIC DIAGRAM
6/97
© Motorola, Inc. 1997
1
REV 0



No Preview Available !

MC74VHCT138A
EXPANDED LOGIC DIAGRAM
A0 1
A1 2
A2 3
E2 5
E1 4
E3 6
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
7 Y7
MOTOROLA
2 VHC Data – Advanced CMOS Logic
DL203 — Rev 1



No Preview Available !

MC74VHCT138A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout
DC Supply Voltage
DC Input Voltage
DC Output Voltage
– 0.5 to + 7.0
– 0.5 to + 7.0
VCC = 0 – 0.5 to + 7.0
High or Low State – 0.5 to VCC + 0.5
V
V
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIIK Input Diode Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIOK Output Diode Current (VOUT < GND; VOUT > VCC)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIout DC Output Current, per Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎICC DC Supply Current, VCC and GND Pins
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
– 20
± 20
± 25
± 75
500
450
mA
mA
mA
mA
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability. Functional operation under absolute–maximum–rated conditions is not
implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
v vVout should be constrained to the
range GND (Vin or Vout) VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Min Max Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC DC Supply Voltage
4.5 5.5 V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin DC Input Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout DCOutputVoltage
VCC = 0
High or Low State
0
0
0
5.5
5.5
VCC
V
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTA Operating Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtr, tf Input Rise and Fall Time
– 40 + 85 _C
VCC =5.0V ±0.5V 0
20 ns/V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎDC ELECTRICAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVIH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVIL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVOH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVOL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎICC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎICCT
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIOPD
Parameter
Minimum High–Level
Input Voltage
Maximum Low–Level
Input Voltage
Minimum High–Level
Output Voltage
Vin = VIH or VIL
Maximum Low–Level
Output Voltage
Vin = VIH or VIL
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
Quiescent Supply
Current
Output Leakage
Current
Test Conditions
VCC
V
4.5 to
5.5
4.5 to
5.5
IOH = – 50µA 4.5
IOH = – 8mA 4.5
IOL = 50µA 4.5
IOL = 8mA 4.5
Vin = 5.5 V or GND
0 to 5.5
Vin = VCC or GND
5.5
Per Input: VIN = 3.4V
Other Input: VCC or GND
VOUT = 5.5V
5.5
0
TA = 25°C
Min Typ Max
2.0
0.8
4.4 4.5
3.94
0.0 0.1
0.36
± 0.1
4.0
1.35
0.5
TA = – 40 to 85°C
Min Max
2.0
Unit
V
0.8 V
4.4 V
3.80
0.1 V
0.44
± 1.0
µA
20.0 µA
1.50 mA
5.0 µA
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
3
MOTOROLA



No Preview Available !

MC74VHCT138A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎAC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
tPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCin
Parameter
Maximum Propagation Delay,
A to Y
Maximum Propagation Delay,
E3 to Y
Maximum Propagation Delay,
E2 or E1 to Y
Maximum Input Capacitance
Test Conditions
VCC = 5.0 ± 0.5V
VCC = 5.0 ± 0.5V
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
TA = 25°C
Min Typ Max
7.6 10.4
8.1 11.4
6.6 9.1
7.1 10.1
7.0 9.6
7.5 10.6
4 10
TA = – 40 to 85°C
Min Max
1.0 12.0
1.0 13.0
1.0 10.5
1.0 11.5
1.0 11.0
1.0 12.0
10
Unit
ns
ns
ns
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Note NO TAG)
49 pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD  VCC2  fin + ICC  VCC.
SWITCHING WAVEFORMS
A
tPLH
Y
VALID
1.5V
1.5V
VALID
tPHL
Figure 1.
3V
GND
VOH
VOL
E3
tPHL
Y
1.5V
1.5V
Figure 2.
3V
GND
tPLH
VOH
VOL
E2 or E1
Y
1.5V
tPHL
1.5V
Figure 3.
3V
GND
tPLH
VOH
VOL
MOTOROLA
TEST CIRCUIT
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 4. Test Circuit
4
VHC Data – Advanced CMOS Logic
DL203 — Rev 1



MC74VHCT138A datasheet pdf
Download PDF
MC74VHCT138A pdf
View PDF for Mobile


Related : Start with MC74VHCT138 Part Numbers by
MC74VHCT138A 3-to-8 Line Decoder MC74VHCT138A
Motorola
MC74VHCT138A pdf
MC74VHCT138A 3-to-8 Line Decoder MC74VHCT138A
ON Semiconductor
MC74VHCT138A pdf

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Contact