MC74VHC157 Datasheet PDF - ON Semiconductor

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MC74VHC157
ON Semiconductor

Part Number MC74VHC157
Description Quad 2-Channel Multiplexer
Page 7 Pages


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MC74VHC157
Quad 2- Channel Multiplexer
The MC74VHC157 is an advanced high--speed CMOS quad
2--channel multiplexer, fabricated with silicon gate CMOS
technology. It achieves high--speed operation similar to equivalent
Bipolar--Schottky TTL, while maintaining CMOS low--power
dissipation.
It consists of four 2--input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems
to 3 V systems.
High Speed: tPD = 4.1 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
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Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 82 FETs
These devices are available in Pb--free package(s). Specifications herein
apply to both standard and Pb--free devices. Please see our website at
www.onsemi.com for specific Pb--free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
S1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 VCC
15 E
14 A3
13 B3
12 Y3
11 A2
10 B2
9 Y2
Figure 1. Pin Assignment
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MARKING
DIAGRAMS
SOIC--16
D SUFFIX
CASE 751B
16
VHC157
AWLYYWW
1
9
8
TSSOP--16
DT SUFFIX
CASE 948F
16 9
VHC
157
ALYW
18
16
SOIC EIAJ--16
M SUFFIX
CASE 966
1
74VHC157
ALYW
A
L, WL
Y, YY
W, WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
9
8
ORDERING INFORMATION
Device
Package
Shipping
MC74VHC157D
SOIC--16 48 Units/Rail
MC74VHC157DR2 SOIC--16 2500 Units/Reel
MC74VHC157DT TSSOP--16 96 Units/Rail
MC74VHC157DTR2 TSSOP--16 2500 Units/Reel
MC74VHC157M
MC74VHC157MEL
SOIC
EIAJ--16
SOIC
EIAJ--16
50 Units/Rail
2000 Units/Reel
© Semiconductor Components Industries, LLC, 2006
March, 2006 -- Rev. 5
1
Publication Order Number:
MC74VHC157/D



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NIBBLE
INPUTS
E
S
2
A0
B0 3
A1 5
B1 6
11
A2
B2 10
A3 14
B3 13
15
1
MC74VHC157
4 Y0
7 Y1
9 Y2
DATA
OUTPUTS
12 Y3
Figure 2. Expanded Logic Diagram
E
S
15
1
A0
B0
A1
B1
2
3
5
6
A2
B2
11
10
A3
B3
14
13
EN
G1
1 MUX
1
4 Y0
7 Y1
9 Y2
12 Y3
Figure 3. IEC Logic Symbol
FUNCTION TABLE
Inputs
Outputs
E S Y0 -- Y3
HX L
L L A0--A3
L H B0--B3
A0 -- A3, B0 -- B3 = the levels
of the respective Data--Word
Inputs.
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MC74VHC157
MAXIMUM RATINGS (Note 1)
Symbol
Parameter
Value
Unit
VCC
VI
VO
IIK
IOK
IO
ICC
TSTG
TL
TJ
θJA
PD
MSL
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Power Dissipation in Still Air at 85_C
Moisture Sensitivity
VI < GND
VO < GND
0.5 to +7.0
0.5 to VCC +7.0
0.5 to VCC +7.0
20
±20
±25
±100
65 to +150
260
+150
250
250
Level 1
V
V
V
mA
mA
mA
mA
_C
_C
_C
_C/W
mW
FR
VESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% -- 35%
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
UL--94--VO (0.125 in)
>2000
>200
N/A
V
ILatch--Up Latch--Up Performance
Above VCC and Below GND at 85_C (Note 5)
±500
mA
1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum--rated
conditions is not implied.
2. Tested to EIA/JESD22--A114--A.
3. Tested to EIA/JESD22--A115--A.
4. Tested to JESD22--C101--A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min Max
VCC DC Supply Voltage
2.0 5.5
VIN DC Input Voltage
(Note 6)
0
5.5
VOUT
DC Output Voltage
0 VCC
TA Operating Temperature Range, all Package Types
55
125
tr, tf Input Rise or Fall Time
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
0
0
100
20
6. Unused inputs may not be left open. All inputs must be tied to a high--logic voltage level or a low--logic input voltage level.
Unit
V
V
V
_C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature _C
Time, Hours
Time, Years
80
1,032,200
117.8
90
419,300
47.9
100 178,700 20.4
110 79,600
9.4
120 37,000
4.2
130 17,800
2.0
140 8,900
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
1
1 10
100 1000
TIME, YEARS
Figure 4. Failure Rate vs. Time Junction Temperature
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MC74VHC157
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
VIH
VIL
VOH
Parameter
High--Level
Input Voltage
Low--Level
Input Voltage
High--Level
Output Voltage
Condition
VCC
(V)
2.0
3.0 to 5.5
2.0
3.0 to 5.5
VIN = VIH or VIL
IOH = --50 mA
2.0
3.0
4.5
TA = 25_C
Min Typ Max
1.5
0.7 VCC
0.5
0.3 VCC
1.9 2.0
2.9 3.0
4.4 4.5
VIN = VIH or VIL
IOH = --4 mA
IOH = --8 mA
3.0
4.5
VOL Low--Level
VIN = VIH or VIL
2.0
Output Voltage IOL = 50 mA
3.0
4.5
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
VIN = VIH or VIL
IOH = 4 mA
IOH = 8 mA
3.0
4.5
IIN Input Leakage VIN = 5.5 V or 0 to 5.5
Current
GND
0.36
0.36
±0.1
ICC Quiescent
VIN = VCC or
Supply Current GND
5.5
4.0
TA 85_C
Min Max
1.5
0.7 VCC
0.5
0.3 VCC
1.9
2.9
4.4
2.48
3.8
0.1
0.1
0.1
0.44
0.44
±1.0
40.0
--55_C TA125_C
Min Max
1.5
0.7 VCC
0.5
0.3 VCC
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
±1.0
40.0
Unit
V
V
V
V
mA
mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol Characteristic
Test Conditions
TA = 25_C
Min Typ Max
tPLH,
tPHL
Propagation Delay, VCC = 3.3 ± 0.3 V CL = 15 pF
A to B to Y
CL = 50 pF
6.2 9.7
8.7 13.2
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
4.1 6.4
5.6 8.4
tPLH,
tPHL
Propagation Delay, VCC = 3.3 ± 0.3 V CL = 15 pF
S to Y
CL = 50 pF
8.4 13.2
10.9 16.7
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
5.3 8.1
6.8 10.1
tPLH,
tPHL
Propagation Delay, VCC = 3.3 ± 0.3 V CL = 15 pF
E to Y
CL = 50 pF
8.7 13.6
11.2 17.1
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
5.6 8.6
7.1 10.6
CIN Input Capacitance
4 10
TA 85_C
Typ Max
1.0 11.5
1.0 15.0
1.0 7.5
1.0 9.5
1.0 15.5
1.0 19.0
1.0 9.5
1.0 11.5
1.0 16.0
1.0 19.5
1.0 10.0
1.0 12.0
10
--55_C TA125_C
Typ Max
1.0 11.5
1.0 15.0
1.0 7.5
1.0 9.5
1.0 15.5
1.0 19.0
1.0 9.5
1.0 11.5
1.0 16.0
1.0 19.5
1.0 10.0
1.0 12.0
10
Unit
ns
ns
ns
pF
Typical @ 25_C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Note 7)
20 pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current
power consumption: PD =
can be obtained
CPD ¯ VCC2 ¯ fin
by the
+ ICC
equation:
¯ VCC.
ICC(OPR)
=
CPD
¯
VCC
¯
fin
+
ICC.
CPD
is
used
to
determine
the
no--
load
dynamic
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