MC74VHC125 Datasheet PDF - ON Semiconductor

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MC74VHC125
ON Semiconductor

Part Number MC74VHC125
Description Quad Bus Buffer
Page 8 Pages


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MC74VHC125
Quad Bus Buffer
with 3–State Control Inputs
The MC74VHC125 is a high speed CMOS quad bus buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC125 requires the 3–state control input (OE) to be set
High to place the output into the high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
High Speed: tPD = 3.8ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
Active–Low Output Enables
A1 2
OE1 1
5
A2
OE2 4
3
Y1
6
Y2
9
A3
OE3 10
12
A4
OE4 13
8 Y3
11
Y4
FUNCTION TABLE
VHC125
Inputs Output
A OE Y
HL
LL
XH
H
L
Z
http://onsemi.com
14–LEAD SOIC
D SUFFIX
CASE 751A
14–LEAD TSSOP
DT SUFFIX
CASE 948G
14–LEAD SOIC EIAJ
M SUFFIX
CASE 965
PIN CONNECTION AND
MARKING DIAGRAM (Top View)
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 VCC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
For detailed package marking information, see the Marking
Diagram section on page 5 of this data sheet.
ORDERING INFORMATION
Device
Package
Shipping
MC74VHC125D
SOIC
55 Units/Rail
MC74VHC125DT TSSOP
96 Units/Rail
MC74VHC125M SOIC EIAJ 50 Units/Rail
© Semiconductor Components Industries, LLC, 2000
April, 2000 – Rev. 2
1
Publication Order Number:
MC74VHC125/D



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MC74VHC125
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIIK
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIOK
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎICC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD
DC Supply Voltage
– 0.5 to + 7.0
V
DC Input Voltage
– 0.5 to + 7.0
V
DC Output Voltage
Input Diode Current
– 0.5 to VCC + 0.5 V
– 20 mA
Output Diode Current
± 20 mA
DC Output Current, per Pin
± 25 mA
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
± 50
500
450
mA
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ* Absolutemaximumcontinuousratingsarethosevaluesbeyondwhichdamagetothedevice
may occur. Exposure to these conditions or conditions beyond those indicated may
adversely affect device reliability. Functional operation under absolute–maximum–rated
conditions is not implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
v vVout should be constrained to the
range GND (Vin or Vout) VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtr, tf
DC Supply Voltage
2.0
DC Input Voltage
0
DC Output Voltage
0
Operating Temperature, All Package Types
– 40
Input Rise and Fall Time
VCC = 3.3V ±0.3V
VCC =5.0V ±0.5V
0
0
Max
5.5
5.5
VCC
+ 85
100
20
Unit
V
V
V
_C
ns/V
DC ELECTRICAL CHARACTERISTICS
VCC
TA = 25°C
TA 85°C
TA 125°C
Symbol
Parameter
Test Conditions
(V) Min Typ Max Min Max Min Max Unit
VIH Minimum High–Level
Input Voltage
2.0 1.5
3.0 2.1
4.5 3.15
5.5 3.85
1.5 1.5
2.1 2.1
3.15 3.15
3.85 3.85
V
VIL Maximum Low–Level
Input Voltage
2.0 0.5 0.5 0.5 V
3.0 0.9 0.9 0.9
4.5 1.35 1.35 1.35
5.5 1.65 1.65 1.65
VOH
VOL
IOZ
Minimum High–Level
Output Voltage
VIN = VIH or VIL
Maximum Low–Level
Output Voltage
VIN = VIH or VIL
Maximum 3–State
Leakage Current
VIN = VIH or VIL
IOH = –50µA
VIN = VIH or VIL
IOH = –4mA
IOH = –8mA
VIN = VIH or VIL
IOL = 50µA
VIN = VIH or VIL
IOL = 4mA
IOL = 8mA
VIN = VIH or VIL
VOUT = VCC or GND
2.0 1.9 2.0 1.9 1.9
3.0 2.9 3.0 2.9 2.9
4.5 4.4 4.5 4.4 4.4
V
3.0 2.58
4.5 3.94
2.48 2.34
3.80 3.66
V
2.0 0.0 0.1 0.1 0.1 V
3.0 0.0 0.1 0.1 0.1
4.5 0.0 0.1 0.1 0.1
V
3.0 0.36 0.44 0.52
4.5 0.36 0.44 0.52
5.5
±0.25
±2.5
±2.5 µA
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MC74VHC125
IIN Maximum Input VIN = 5.5V or GND 0 to
Leakage Current
5.5
±0.1 ±1.0 ±1.0 µA
ICC Maximum Quiescent VIN = VCC or GND
5.5
4.0 40 40 µA
Supply Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎAC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Test Conditions
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
Maximum Propagation
Delay,
A to Y
VCC = 3.3 ± 0.3V
VCC = 5.0 ± 0.5V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZL,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLZ,
tPHZ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtOSLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtOSHL
Maximum Output Enable
TIme,
OE to Y
Maximum Output
Disable Time,
OE to Y
Output–to–Output Skew
VCC = 3.3 ± 0.3V
RL = 1k
VCC = 5.0 ± 0.5V
RL = 1k
VCC = 3.3 ± 0.3V
RL = 1k
VCC = 5.0 ± 0.5V
RL = 1k
VCC = 3.3 ± 0.3V
(Note 1.)
VCC = 5.0 ± 0.5V
(Note 1.)
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCin MaximumInput
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCapacitance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCout
Maximum Three–State
Output Capacitance
(Output in High
Impedance State)
TA = 25°C
Min Typ Max
5.6 8.0
8.1 11.5
3.8 5.5
5.3 7.5
5.4 8.0
7.9 11.5
3.6 5.1
5.1 7.1
9.5 13.2
6.1 8.8
1.5
1.0
4 10
6
TA = 85°C
Min Max
1.0 9.5
1.0 13.0
1.0 6.5
1.0 8.5
1.0 9.5
1.0 13.0
1.0 6.0
1.0 8.0
1.0 15.0
TA = 125°C
Min Max Unit
1.0 12.0 ns
1.0 16.0
1.0 8.5
1.0 10.5
1.0 11.5 ns
1.0 15.0
1.0 7.5
1.0 9.5
1.0 18.0 ns
1.0 10.0 1.0 12.0
1.5 1.5 ns
1.0 1.0
10 10 pF
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Note 2.)
14 pF
1. Parameter guaranteed by design. tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 4 (per buffer). CPD is used to determine the
no–load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ Max
0.3 0.8
– 0.3
– 0.8
3.5
1.5
Unit
V
V
V
V
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A
tPLH
50%
50% VCC
Y
Figure 1.
MC74VHC125
SWITCHING WAVEFORMS
VCC
GND
tPHL
OE 50%
tPZL tPLZ
Y 50% VCC
tPZH tPHZ
Y 50% VCC
Figure 2.
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH – 0.3V
HIGH
IMPEDANCE
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
DEVICE
UNDER
TEST
TEST POINT
OUTPUT 1 k
CL *
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 3. Test Circuit
*Includes all probe and jig capacitance
Figure 4. Test Circuit
INPUT
Figure 5. Input Equivalent Circuit
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MC74VHC125 datasheet pdf
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