MC74AC573 Datasheet PDF - Motorola


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MC74AC573
Motorola

Part Number MC74AC573
Description OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS
Page 8 Pages

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MC74AC573
MC74ACT573
Octal DĆType Latch
with 3ĆState Outputs
The MC74AC573/74ACT573 is a high-speed octal latch with buffered common
Latch Enable (LE) and buffered common Output Enable (OE) inputs.
The MC74AC573/74ACT573 is functionally identical to the MC74AC373/
74ACT373 but has inputs and outputs on opposite sides.
Inputs and Outputs on Opposite Sides of Package
Allowing Easy Interface with Microprocessors
Useful as Input or Output Port for Microprocessors
Functionally Identical to MC74AC373/74ACT373
3-State Outputs for Bus Interfacing
Outputs Source/Sink 24 mA
• ′ACT573 Has TTL Compatible Inputs
VCC O0 O1 O2 O3 O4 O5 O6 O7 LE
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
PIN NAMES
D0–D7
LE
OE
O0–O7
Data Inputs
Latch Enable Input
3-State Output Enable Input
3-State Latch Outputs
TRUTH TABLE
Inputs
Outputs
OE LE Dn
L HH
LHL
LLX
HXX
On
H
H
O0
Z
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before LOW-to-HIGH Transition of Clock
OCTAL D-TYPE
LATCH WITH
3-STATE OUTPUTS
N SUFFIX
CASE 738-03
PLASTIC
DW SUFFIX
CASE 751D-04
PLASTIC
LOGIC SYMBOL
D0 D1 D2 D3 D4 D5 D6 D7
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
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MC74AC573 MC74ACT573
FUNCTIONAL DESCRIPTION
The MC74AC573/74ACT574 contains eight D-type latches
with 3-state output buffers. When the Latch Enable (LE) input is
HIGH, data on the Dn inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is LOW
the latches store the information that was present on the D
inputs a setup time preceding the HIGH-to-LOW transition of
LE. The 3-state buffers are controlled by the Output Enable
(OE) input. When OE is LOW, the buffers are enabled. When
OE is HIGH the buffers are in the high impedance mode but
this does not interfere with entering new data into the latches.
LOGIC DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
DDDDDDDD
QQQQQQQQ
LE LE LE LE LE LE LE LE
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
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MC74AC573 MC74ACT573
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
Vin
Vout
Iin
Iout
ICC
Tstg
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC VCC or GND Current per Output Pin
Storage Temperature
–0.5 to +7.0
–0.5 to VCC +0.5
–0.5 to VCC +0.5
±20
±50
±50
–65 to +150
V
V
V
mA
mA
mA
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ
VCC
Supply Voltage
AC
ACT
2.0 5.0
4.5 5.0
Vin, Vout
tr, tf
DC Input Voltage, Output Voltage (Ref. to GND)
Input Rise and Fall Time (Note 1)
AC Devices except Schmitt Inputs
VCC @ 3.0 V
VCC @ 4.5 V
VCC @ 5.5 V
0
150
40
25
Input Rise and Fall Time (Note 2)
tr, tf ACT Devices except Schmitt Inputs
TJ Junction Temperature (PDIP)
TA Operating Ambient Temperature Range
VCC @ 4.5 V
VCC @ 5.5 V
–40
10
8.0
25
IOH Output Current — High
IOL Output Current — Low
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
Max
6.0
5.5
VCC
140
85
–24
24
Unit
V
V
ns/V
ns/V
°C
°C
mA
mA
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MC74AC573 MC74ACT573
DC CHARACTERISTICS
Symbol
Parameter
VIH
VIL
VOH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
VCC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
74AC
74AC
TA = +25°C
TA =
–40°C to +85°C
Typ Guaranteed Limits
1.5 2.1
2.25 3.15
2.75 3.85
2.1
3.15
3.85
1.5 0.9
2.25 1.35
2.75 1.65
0.9
1.35
1.65
2.99 2.9
4.49 4.4
5.49 5.4
2.9
4.4
5.4
VOL
Maximum Low Level
Output Voltage
3.0 2.56
4.5 3.86
5.5 4.86
3.0 0.002 0.1
4.5 0.001 0.1
5.5 0.001 0.1
2.46
3.76
4.76
0.1
0.1
0.1
IIN Maximum Input
Leakage Current
3.0 0.36 0.44
4.5 0.36 0.44
5.5 0.36 0.44
5.5 ±0.1 ±1.0
IOZ Maximum
3-State
Current
5.5 ±0.5 ±5.0
IOLD
IOHD
ICC
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5 75
5.5 –75
5.5 8.0 80
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
Unit
V
V
V
V
V
V
µA
µA
mA
mA
µA
Conditions
VOUT = 0.1 V
or VCC – 0.1 V
VOUT = 0.1 V
or VCC – 0.1 V
IOUT = –50 µA
*VIN = VIL or VIH
–12 mA
IOH –24 mA
–24 mA
IOUT = 50 µA
*VIN = VIL or VIH
12 mA
IOL 24 mA
24 mA
VI = VCC, GND
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
VOLD = 1.65 V Max
VOHD = 3.85 V Min
VIN = VCC or GND
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