MB90096 Datasheet PDF - Fujitsu Media Devices

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MB90096
Fujitsu Media Devices

Part Number MB90096
Description On-screen Display Controller
Page 30 Pages


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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-28826-5E
ASSP For Screen Display Control
CMOS
On-screen Display Controller
MB90096
s DESCRIPTION
The MB90096 is a multi-scan on-screen display controller that supports horizontal sync signal frequencies of 15
kHz to 120 kHz.The on-screen display configuration is up to 32 characters x 16 lines. The character configuration
is up to 24 dots x 32 dots for high resolution, ideal for wide-screen TV, HDTV, and high-resolution personal computer
displays.
The character display functions include sprite character, character background display, and graphics functions,
contributing to the use of colorful GUI displays.
The MB90096 contains display memory (VRAM), character font ROM, and VCO, allowing characters to be dis-
played with a minimum of external components. This device also includes command table ROM for storage of
display command data, greatly reducing the load on the microcontroller.
s PACKAGES
28-pin plastic SH-DIP
28-pin plastic SOP
(DIP-28P-M03)
(FPT-28P-M17)



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MB90096
s FEATURES
• Screen display capacity: Up to 32 characters x 16 lines (512 characters)
• Character configuration:
L size: 24 dots (horizontal) x 2h * dots (vertical)
M size: 18 dots (horizontal) x 2h * dots (vertical)
S size: 12 dots (horizontal) x 2h * dots (vertical)
*: h = 9 to 16
L, M, S sizes can be selected by individual character
Graphics characters can be displayed in L or S size only
Two h values can be set per screen, and either of the two can be selected for each line on the screen.
• Font types: 512 different fonts included (user selectable over entire screen)
• Display modes:
Normal characters/graphic characters:
(set for each character)
Trimmed display (horizontal trimming/pattern back ground): (set for each screen)
Character background (fill/shaded background):
(set for each character)
Line background (fill/shaded back ground):
(set for each line)
Enlarged (normal, double width, double height, double width x double height): (set for each line)
Blinking: Blinking characters:
(set for each character)
Blink period, duty ratio:
(set for each screen)
• Sprite character display (graphics display only):
Capable of displaying one block of characters (maximum 2 x 2 characters) on main screen.
(Can move horizontally and vertically in 2-dot increments.)
Setting applies to the first 256 characters only (character codes 000 to 0FFH).
• Background character display (graphics display only):
Capable of displaying a repeated pattern (2 x 2 characters) on main screen.
Setting applies to the first 256 characters only (character codes 000 to 0FFH).
• Display colors: Character/background colors: 16 colors each (set for each character)
Line background/fill colors: 16 characters each (set for each line)
Screen background colors: 16 colors (set for each screen)
Graphics character dot colors: 16 colors (set for each dot)
Shading background frame colors (highlight/shadow):
16 colors each (set for each screen)
• Display position control:
Horizontal display start position:Set in 4-dot units (for each screen)
Vertical display start position: Set in 4-dot units (for each screen)
Line spacing control:
Set in 2-dot units (for each line)
• Character/color signal output:
ROUT, GOUT, BOUT, IOUT (color signals)
VOB1 (OSD display period output signal)
VOB2 (semi-transparent color period output signal)
• Command transfer function (macro service):
Command table ROM, 16Kbyte included
• Compatible horizontal sync signal frequencies:
15 kHz to 120 kHz (PLL circuit included)
• Microcontroller interface:
16-bit serial input (3 signal input pins)
• Packages:
SH-DIP-28, SOP-28
• Power supply voltage: +5 V
2



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s PIN ASSIGNMENTS
(TOP VIEW)
CPOUT 1
AVSS
2
VCOIN 3
AVSS
4
RESET 5
TEST 6
VSS 7
DOCKI 8
DOCKO 9
FH 10
EVEN 11
HSYNC 12
VSYNC
13
DISP
14
28 AV3V
27 AVCC
26 CS
25 SIN
24 SCLK
23 TRE
22 VCC
21 V3V
20 BOUT (C0)
19 ROUT (C1)
18 GOUT (C2)
17 IOUT (C3)
16 VOB1
15 VOB2
(DIP-28P-M03)
(FPT-28P-M17)
MB90096
3



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MB90096
s PIN DESCRIPTIONS
Pin
no.
Pin name
I/O
Circuit
type
Function
1 CPOUT O
A
Horizontal sync phase comparison result signal output pin.
Connects to external low-pass filter.
3 VCOIN I
B
Internal VCO voltage input pin.
Receives voltage signal input from external low-pass filter
8 DOCKI I
Dot clock input pin.
D
Used only when operating on an externally generated dot clock signal. *1
When unused, the horizontal sync signal *2 should be input at this pin.
Internal pull-up resistance included.
9 DOCKO O
C
Output pin for the dot clock signal generated by the internal VCO.
This signal can be fixed at “H” level by a command.
10 FH
O C Output pin for the horizontal sync signal generated by the PLL circuit.
11 EVEN
I
Field control signal input pin.
D
This pin is disabled when noninterlaced display or internally generated
field control signals are selected by command.
Internal pull-up resistance included.
12 HSYNC
I
Horizontal sync signal input pin.
D
The period of this signal is used to generate the dot clock signal. The
active level is programmable.
Internal pull-up resistance included.
13 VSYNC
I
Vertical sync signal input pin.
D The active level is programmable.
Internal pull-up resistance included.
Display output (ROUT, GOUT, BOUT, IOUT, VOB1, VOB2) control pin.
When this pin is set to “L” level, the display control is forcibly set to
14 DISP I D inactive. Normally, the horizontal and vertical blanking signals are input
here. *3
Internal pull-up resistance included.
17 IOUT (C3)
18 GOUT (C2)
19 ROUT (C1)
20 BOUT (C0)
O
C
Color signal output pins.
The active level is programmable.
16 VOB1
O
C
Display period output pin.
The active level is programmable.
15 VOB2
O
C
Semi-transparent period output signal.
The active level is programmable.
24 SCLK
I
D
Serial transfer shift clock input pin.
Internal pull-up resistance included.
25 SIN
I
D
Serial data input pin.
Internal pull-up resistance included.
26 CS
Chip select pin.
I D Set to “L” level for serial transfer.
Internal pull-up resistance included.
(Continued)
4



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