MB504LV Datasheet PDF - Fujitsu

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MB504LV
Fujitsu

Part Number MB504LV
Description (MB501LV / MB504LV) Low Voltage . Low Power 2 Modulus Prescalers
Page 9 Pages


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mSept. 1995
.coEdition 4.0a
DATA SHEET
MLOBW.D5a0VtOa1SLLThVAeeG/5tE40U/L4OLWVPOWER TWO MODULUS PRESCALERSLOW VOLTAGE/LOW POWER TWO MODULUS PRESCALERS
wThe Fujitsu MB501LV/504LV are low power and low voltage versions of
wMB501/504, two modulus prescalers used with a frequency synthesizer to make
a Phase Locked Loop (PLL). They will divide the input frequency by the modulus
wof 64/65 or 128/129 for the MB501LV, and 32/33 or 64/65 for the MB504LV. The
moutput level is 1.1V peak to peak on ECL level.
.coS Wide Low Voltage Operation 3.0V typ., +2.7 to 4.5V
S High Frequency Operation, Low Power Operation (VIN = –12dBm min.)
U1.1 GHz at 36mW typ. (MB501LV)
t4520MHz at 18mW typ. (MB504LV)
eS Pulse Swallow Function
eS Wide Operation Temperature TA = –40°C to +85°C
hS Stable Output Amplitude
VOUT = 1.1Vp-p typ.
SS Built-in a termination resistor
taStable output amplitude is obtained up to output load capacitance of 8pF.
S Complete PLL synthesizer circuit with the Fujitsu MB87001A, PLL
asynthesizer IC
.DS Plastic 8-pin Standard Dual-In-Line Package or space saving Flat Package
PLASTIC PACKAGE
DIP-08P-M01
PLASTIC PACKAGE
FPT-08P-M01
wABSOLUTE MAXIMUM RATINGS (see NOTE)
wRating
Symbol
Value
w omSupply Voltage
.cInput Voltage
t4UOutput Current
eStorage Temperature
VCC
VIN
IO
TSTG
-0.5 to +7.0
-0.5 to + VCC
10
– 55 to +125
Unit
V
V
mA
_C
.DataSheNote:
Permanentdevice damage may occur if the aboveAbsolute Maximum Ratings are
exceeded. Functional operation should be restricted to the conditions as detailed in
the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
IN
VCC
SW
OUT
18
2
TOP VIEW
3
7
6
45
IN
NC
MC
GND
This device contains circuitry to protect the inputs against damage
due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this high
impedance circuit.
wwwCopyright E 1992 by FUJITSU LIMITED



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MB501LV
MB504LV
a) MB501LV
Input Buffer
IN
IN
DQ
C
DQ
C
SW
DQ
CM
DQ DQ DQ DQ DQ
SW
CQ CQ CQ CQ CQ
Output
Buffer
OUT
SW
H
H
L
L
Note:
MC Divide Ratio
H 1/64
L 1/65
H 1/128
L 1/129
SW: H = VCC, L = OPEN
MC: H = VIHM to VCC,
L = GND to 0.8V
VHIM = 1/2 VCC +0.3V
MC
b) MB504LV
DQ
Input Buffer
IN
IN
C
DQ
C
SW
DQ
CM
DQ DQ DQ DQ
SW
CQ CQ CQ CQ
Output
Buffer
OUT
SW
H
H
L
L
Note:
MC Divide Ratio
H 1/32
L 1/33
H 1/64
L 1/65
SW: H = VCC, L = OPEN
MC: H = VIHM to VCC,
L = GND to 0.8V
VHIM = 1/2 VCC +0.3V
MC
Figure 1. Block Diagrams
2



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PIN DESCRIPTION
Pin Number
Symbol
1 IN
2 VCC
3 SW
4 OUT
5 GND
6 MC
7 NC
8 IN
Function
Input
DC Supply Voltage
Divide Ratio Control Input (See Divide Ratio Table)
Output
Ground
Modulus Control Input (See Divide Ratio Table)
Non Connection
Complementary Input
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Output Current
Ambient Temperature
Load Capacitance
Symbol
VCC
IO
TA
CL
Min.
2.7
–40
Value
Typ.
3.0
1.2
Max.
4.5
+85
8
MB501LV
MS504LV
Unit
V
mA
°C
pF
3



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MB501LV
MB504LV
ELECTRICAL CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Conditions
Min.
Power Supply Current
MB501LV
MB504LV
ICC
VCC = 3.0V
Value
Typ.
12
6
Max.
Unit
mA
mA
Output Amplitude
Input Frequency
VO 0.8
MB501LV
MB504LV
fIN
With input coupling capacitor
1000pF
10
10
1.1 VP–P
1100
MHz
520 MHz
Input Signal Amplitude
High Level Input Voltage for MC Input
Low Level Input Voltage for MC Input
High Level Input Voltage for SW Input
Low Level Input Voltage for SW Input
High Level Input Current for MC Input
Low Level Input Current for MC Input
Modulus Set-up Time
MC to OUT
Note: * Design Guarantee
MB501LV
MB504LV
PIN
VIHM
VILM
VIHS*
VILS
IIHM
IILM
tSET
VIHM = 1/2 VCC +0.3
VIH = 2.0V
VIL = 0.8V
–12 5.5 dBm
VIHM
V
0.8 V
VCC –0.1
VCC
VCC +0.1
OPEN
V
V
0.4 mA
–0.2 mA
16 26 ns
18 28 ns
4



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