MAX1277 Datasheet PDF - Maxim Integrated Products

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MAX1277
Maxim Integrated Products

Part Number MAX1277
Description (MAX1277 / MAX1279) 12-Bit ADCs
Page 18 Pages


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19-3365; Rev 0; 8/04
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1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
General Description
The MAX1277/MAX1279 are low-power, high-speed, seri-
al-output, 12-bit, analog-to-digital converters (ADCs) with
an internal reference that operates at up to 1.5Msps.
These devices feature true-differential inputs, offering bet-
ter noise immunity, distortion improvements, and a wider
dynamic range over single-ended inputs. A standard
SPI™/QSPI™/MICROWIRE™ interface provides the clock
necessary for conversion. These devices easily interface
with standard digital signal processor (DSP) synchronous
serial interfaces.
The MAX1277/MAX1279 operate from a single +2.7V to
+3.6V supply voltage. The MAX1277/MAX1279 include a
2.048V internal reference. The MAX1277 has a unipolar
analog input, while the MAX1279 has a bipolar analog
input. These devices feature a partial power-down mode
and a full power-down mode for use between conver-
sions, which lower the supply current to 2mA (typ) and
1µA (max), respectively. Also featured is a separate
power-supply input (VL), which allows direct interfacing to
+1.8V to VDD digital logic. The fast conversion speed,
low-power dissipation, excellent AC performance, and DC
accuracy (±1 LSB INL) make the MAX1277/MAX1279
ideal for industrial process control, motor control, and
base-station applications.
The MAX1277/MAX1279 come in a 12-pin TQFN pack-
age, and are available in the commercial (0°C to +70°C)
and extended (-40°C to +85°C) temperature ranges.
Data Acquisition
Bill Validation
Motor Control
Applications
Communications
Portable Instruments
Pin Configuration
TOP VIEW
AIN+ N.C. SCLK
12 11 10
AIN- 1
REF 2
RGND 3
MAX1277
MAX1279
9 CNVST
8 DOUT
7 VL
456
VDD N.C. GND
TQFN
Features
1.5Msps Sampling Rate
Only 22mW (typ) Power Dissipation
Only 1µA (max) Shutdown Current
High-Speed, SPI-Compatible, 3-Wire Serial Interface
68.5dB S/(N + D) at 525kHz Input Frequency
Internal True-Differential Track/Hold (T/H)
Internal 2.048V Reference
No Pipeline Delays
Small 12-Pin TQFN Package
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
MAX1277ACTC-T 0°C to +70°C 12 TQFN-12
MAX1277BCTC-T 0°C to +70°C 12 TQFN-12
MAX1277AETC-T -40°C to +85°C 12 TQFN-12
MAX1277BETC-T -40°C to +85°C 12 TQFN-12
MAX1279ACTC-T 0°C to +70°C 12 TQFN-12
MAX1279BCTC-T 0°C to +70°C 12 TQFN-12
MAX1279AETC-T -40°C to +85°C 12 TQFN-12
MAX1279BETC-T -40°C to +85°C 12 TQFN-12
INPUT
Unipolar
Unipolar
Unipolar
Unipolar
Bipolar
Bipolar
Bipolar
Bipolar
Typical Operating Circuit
+2.7V TO +3.6V
+1.8V TO VDD
10µF 0.01µF
0.01µF
VDD VL
DIFFERENTIAL +
INPUT
VOLTAGE -
4.7µF
0.01µF
AIN+ DOUT
AIN-
MAX1277
MAX1279 CNVST
SCLK
REF
RGND
GND
10µF
µC/DSP
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.



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1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V
VL to GND ................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Inputs
to GND .................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Output
to GND ....................-0.3V to the lower of (VL + 0.3V) and +6V
Analog Inputs and
REF to GND..........-0.3V to the lower of (VDD + 0.3V) and +6V
RGND to GND .......................................................-0.3V to +0.3V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA = +70°C)
12-Pin TQFN (derate 16.9mW/°C above +70°C) ......1349mW
Operating Temperature Ranges
MAX127_ _ CTC.................................................0°C to +70°C
MAX127_ _ ETC ..............................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V, VL = VDD, fSCLK = 24MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
DC ACCURACY
Resolution
Relative Accuracy (Note 1)
Differential Nonlinearity (Note 2)
Offset Error
SYMBOL
CONDITIONS
INL
DNL
MAX127_A
MAX127_B
MAX127_A
MAX127_B
MIN TYP MAX UNITS
12 Bits
-1.0 +1.0
LSB
-1.5 +1.5
-1.0 +1.0
LSB
-1.0 +1.5
±8.0 LSB
Offset-Error Temperature
Coefficient
±1 ppm/°C
Gain Error
Offset nulled
Gain Temperature Coefficient
DYNAMIC SPECIFICATIONS (fIN = 525kHz sine wave, VIN = VREF, unless otherwise noted.)
Signal-to-Noise Plus Distortion
SINAD
66
Total Harmonic Distortion
THD Up to the 5th harmonic
Spurious-Free Dynamic Range
SFDR
Intermodulation Distortion
IMD fIN1 = 250kHz, fIN2 = 300kHz
Full-Power Bandwidth
-3dB point, small-signal method
Full-Linear Bandwidth
S/(N + D) > 68dB, single ended
CONVERSION RATE
Minimum Conversion Time
tCONV (Note 3)
Maximum Throughput Rate
1.5
Minimum Throughput Rate
(Note 4)
10
Track-and-Hold Acquisition Time
tACQ (Note 5)
Aperture Delay
Aperture Jitter
(Note 6)
External Clock Frequency
fSCLK (Note 7)
±6.0 LSB
±2 ppm/°C
68.5 dB
-80 -76
dB
-83 -76
dB
-78 dB
15 MHz
1.2 MHz
0.667
µs
Msps
ksps
125 ns
5 ns
30 ps
24 MHz
2 _______________________________________________________________________________________



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1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V, VL = VDD, fSCLK = 24MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
ANALOG INPUTS (AIN+, AIN-)
Differential Input Voltage Range
Absolute Input Voltage Range
DC Leakage Current
AIN+ - AIN-, MAX1277
VIN AIN+ - AIN-, MAX1279
0
-VREF / 2
0
VREF
+VREF / 2
VDD
±1
V
V
µA
Input Capacitance
Per input pin
16 pF
Input Current (Average)
Time averaged at maximum throughput rate
75
µA
REFERENCE OUTPUT (REF)
REF Output Voltage Range
Voltage Temperature Coefficient
Static, TA = +25°C
2.038
2.048
±50
2.058
V
ppm/°C
Load Regulation
Line Regulation
DIGITAL INPUTS (SCLK, CNVST)
ISOURCE = 0 to 2mA
ISINK = 0 to 100µA
VDD = 2.7V to 3.6V, static
0.35
mV/mA
1.0
0.25 mV/V
Input Voltage Low
Input Voltage High
Input Leakage Current
DIGITAL OUTPUT (DOUT)
VIL
VIH
IIL
0.7 x VL
0.05
0.3 x VL
±10
V
V
µA
Output Load Capacitance
Output Voltage Low
Output Voltage High
Output Leakage Current
POWER REQUIREMENTS
COUT
VOL
VOH
IOL
For stated timing performance
ISINK = 5mA, VL 1.8V
ISOURCE = 1mA, VL 1.8V
Output high impedance
VL - 0.5V
±0.2
30
0.4
±10
pF
V
V
µA
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current,
Normal Mode
VDD
VL
Static, fSCLK = 24MHz
IDD Static, no SCLK
Operational, 1.5Msps
2.7 3.6 V
1.8
VDD
V
68
5 7 mA
79
Analog Supply Current,
Partial Power-Down Mode
IDD
fSCLK = 24MHz
No SCLK
2
mA
2
Analog Supply Current,
Full Power-Down Mode
IDD
fSCLK = 24MHz
No SCLK
1
0.3 1
µA
Operational, full-scale input at 1.5Msps
0.3 1
Digital Supply Current (Note 8)
Static, fSCLK = 24MHz
Partial/full power-down mode,
fSCLK = 24MHz
0.15 0.5
0.1 0.3
mA
Static, no SCLK, all modes
0.1 1
µA
Positive-Supply Rejection
PSR VDD = 3V +20% -10%, full-scale input
±0.2 ±3.0
mV
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1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.6V, VL = VDD, fSCLK = 24MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SCLK Pulse-Width High
SYMBOL
tCH
CONDITIONS
VL = 2.7V to VDD
VL = 1.8V to VDD, minimum recommended
(Note 7)
MIN
18.7
TYP MAX UNITS
ns
22.5
SCLK Pulse-Width Low
VL = 2.7V to VDD
18.7
tCL VL = 1.8V to VDD, minimum recommended
(Note 7)
22.5
ns
SCLK Rise to DOUT Transition
tDOUT
CL = 30pF, VL = 2.7V to VDD
CL = 30pF, VL = 1.8V to VDD
17
ns
24
DOUT Remains Valid After SCLK tDHOLD VL = 1.8V to VDD
4 ns
CNVST Fall to SCLK Fall
tSETUP VL = 1.8V to VDD
10 ns
CNVST Pulse Width
tCSW VL = 1.8V to VDD
20 ns
Power-Up Time; Full Power-Down tPWR-UP
2 ms
Restart Time; Partial Power-Down
tRCV
16 Cycles
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset
error have been nulled.
Note 2: No missing codes over temperature.
Note 3: Conversion time is defined as the number of clock cycles (16) multiplied by the clock period.
Note 4: At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz.
Note 5: The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris-
ing edge of SCLK and terminates on the next falling edge of CNVST. The IC idles in acquisition mode between conversions.
Note 6: Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance.
Note 7: 1.5Msps operation guaranteed for VL > 2.7V. See the Typical Operating Characteristics section for recommended sampling
speeds for VL < 2.7V.
Note 8: Digital supply current is measured with the VIH level equal to VL, and the VIL level equal to GND.
CNVST
SCLK
tSETUP
DOUT
tCL tCH
tDHOLD
tDOUT
Figure 1. Detailed Serial-Interface Timing
VL
tCSW
DOUT
6k
DOUT
6kCL
GND
a) HIGH-Z TO VOH, VOL TO VOH,
AND VOH TO HIGH-Z
CL
GND
b) HIGH-Z TO VOL, VOH TO VOL,
AND VOL TO HIGH-Z
Figure 2. Load Circuits for Enable/Disable Times
4 _______________________________________________________________________________________



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