MAX1276 Datasheet PDF - Maxim Integrated Products

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MAX1276
Maxim Integrated Products

Part Number MAX1276
Description (MAX1276 / MAX1278) 12-Bit ADCs
Page 18 Pages


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19-3364; Rev 0; 8/04
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1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
General Description
The MAX1276/MAX1278 are low-power, high-speed, seri-
al-output, 12-bit, analog-to-digital converters (ADCs) that
operate at up to 1.8Msps and have an internal reference.
These devices feature true-differential inputs, offering bet-
ter noise immunity, distortion improvements, and a wider
dynamic range over single-ended inputs. A standard
SPI™/QSPI™/MICROWIRE™ interface provides the clock
necessary for conversion. These devices easily interface
with standard digital signal processor (DSP) synchronous
serial interfaces.
The MAX1276/MAX1278 operate from a single +4.75V to
+5.25V supply voltage. The MAX1276/MAX1278 include
a 4.096V internal reference. The MAX1276 has a unipolar
analog input, while the MAX1278 has a bipolar analog
input. These devices feature a partial power-down mode
and a full power-down mode for use between conver-
sions, which lower the supply current to 2mA (typ) and
1µA (max), respectively. Also featured is a separate
power-supply input (VL), which allows direct interfacing to
+1.8V to VDD digital logic. The fast conversion speed,
low-power dissipation, excellent AC performance, and DC
accuracy (±1.25 LSB INL) make the MAX1276/MAX1278
ideal for industrial process control, motor control, and
base-station applications.
The MAX1276/MAX1278 come in a 12-pin TQFN pack-
age, and are available in the commercial (0°C to +70°C)
and extended (-40°C to +85°C) temperature ranges.
Features
1.8Msps Sampling Rate
Only 55mW (typ) Power Dissipation
Only 1µA (max) Shutdown Current
High-Speed, SPI-Compatible, 3-Wire Serial Interface
70dB S/(N + D) at 525kHz Input Frequency
Internal True-Differential Track/Hold (T/H)
Internal 4.096V Reference
No Pipeline Delays
Small 12-Pin TQFN Package
Ordering Information
PART
MAX1276CTC-T
MAX1276ETC-T
MAX1278CTC-T
MAX1278ETC-T
TEMP RANGE
PIN-
PACKAGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
12 TQFN-12
12 TQFN-12
12 TQFN-12
12 TQFN-12
INPUT
Unipolar
Unipolar
Bipolar
Bipolar
Data Acquisition
Bill Validation
Motor Control
Applications
Communications
Portable Instruments
Pin Configuration
TOP VIEW
AIN+ N.C. SCLK
12 11 10
AIN- 1
REF 2
RGND 3
MAX1276
MAX1278
9 CNVST
8 DOUT
7 VL
456
VDD N.C. GND
TQFN
Typical Operating Circuit
4.75V TO +5.25V
+1.8V TO VDD
10µF 0.01µF
0.01µF
VDD VL
DIFFERENTIAL +
INPUT
VOLTAGE -
4.7µF 0.01µF
AIN+ DOUT
AIN-
MAX1276
MAX1278 CNVST
SCLK
REF
RGND
GND
10µF
µC/DSP
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.



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1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V
VL to GND ................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Inputs
to GND .................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Output
to GND ....................-0.3V to the lower of (VL + 0.3V) and +6V
Analog Inputs and
REF to GND..........-0.3V to the lower of (VDD + 0.3V) and +6V
RGND to GND .......................................................-0.3V to +0.3V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA = +70°C)
12-Pin TQFN (derate 16.9mW/°C above +70°C) ......1349mW
Operating Temperature Ranges
MAX127_ CTC ...................................................0°C to +70°C
MAX127_ ETC.................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
DC ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
SYMBOL
CONDITIONS
INL
DNL
(Notes 1, 2)
(Notes 1, 3)
MIN TYP MAX UNITS
12
-1.25
-1.0
+1.25
+1.0
±6.0
Bits
LSB
LSB
LSB
Offset-Error Temperature
Coefficient
±1 ppm/°C
Gain Error
Offset nulled
±6.0 LSB
Gain Temperature Coefficient
±2 ppm/°C
DYNAMIC SPECIFICATIONS (fIN = 525kHz sine wave, VIN = VREF, unless otherwise noted.)
Signal-to-Noise Plus Distortion
SINAD (Note 1)
69
70
dB
Total Harmonic Distortion
THD Up to the 5th harmonic (Note 1)
-80 -76
dB
Spurious-Free Dynamic Range
SFDR (Note 1)
-83 -76
dB
Intermodulation Distortion
IMD fIN1 = 250kHz, fIN2 = 300kHz
-78 dB
Full-Power Bandwidth
-3dB point, small-signal method
20 MHz
Full-Linear Bandwidth
S/(N + D) > 68dB, single ended
2.0 MHz
CONVERSION RATE
Minimum Conversion Time
tCONV (Note 4)
0.556
µs
Maximum Throughput Rate
1.8 Msps
Minimum Throughput Rate
(Note 5)
10 ksps
Track-and-Hold Acquisition Time
Aperture Delay
tACQ (Note 6)
104 ns
5 ns
Aperture Jitter
(Note 7)
30 ps
External Clock Frequency
ANALOG INPUTS (AIN+, AIN-)
fSCLK
28.8 MHz
Differential Input Voltage Range
AIN+ - AIN-, MAX1276
VIN AIN+ - AIN-, MAX1278
0
-VREF / 2
VREF
+VREF / 2
V
Absolute Input Voltage Range
0
VDD
V
2 _______________________________________________________________________________________



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1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
DC Leakage Current
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
±1 µA
Input Capacitance
Input Current (Average)
REFERENCE OUTPUT (REF)
Per input pin
Time averaged at maximum throughput rate
16
75
pF
µA
REF Output Voltage Range
Static, TA = +25°C
4.086 4.096 4.106
V
Voltage Temperature Coefficient
Load Regulation
Line Regulation
DIGITAL INPUTS (SCLK, CNVST)
Input Voltage Low
Input Voltage High
Input Leakage Current
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current,
Normal Mode
VIL
VIH
IIL
VDD
VL
IDD
Analog Supply Current,
Partial Power-Down Mode
Analog Supply Current,
Full Power-Down Mode
IDD
IDD
Digital Supply Current (Note 8)
Positive-Supply Rejection
DIGITAL OUTPUT (DOUT)
Output Load Capacitance
Output Voltage Low
Output Voltage High
Output Leakage Current
PSR
COUT
VOL
VOH
IOL
ISOURCE = 0 to 2mA
ISINK = 0 to 200µA
VDD = 4.75V to 5.25V, static
Output high impedance
Static, fSCLK = 28.8MHz
Static, no SCLK
Operational, 1.8Msps
fSCLK = 28.8MHz
No SCLK
fSCLK = 28.8MHz
No SCLK
Operational, full-scale input at 1.8Msps
Static, fSCLK = 28.8MHz
Partial/full power-down mode,
fSCLK = 28.8MHz
Static, no SCLK, all modes
VDD = 5V ±5%, full-scale input
For stated timing performance
ISINK = 5mA, VL 1.8V
ISOURCE = 1mA, VL 1.8V
Output high impedance
±50 ppm/°C
0.3
mV/mA
0.5
0.5 mV/V
0.7 x VL
±0.2
0.3 x VL
±10
V
V
µA
4.75 5.25
1.8 VDD
8 11
57
10 13
2
2
1
0.3 1
1 2.5
0.4 1
0.2 0.5
0.1
±0.2
1
±3.0
V
V
mA
mA
µA
mA
µA
mV
VL - 0.5V
±0.2
30
0.4
±10
pF
V
V
µA
_______________________________________________________________________________________ 3



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1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Pulse-Width High
SCLK Pulse-Width Low
SCLK Rise to DOUT Transition
DOUT Remains Valid After SCLK
CNVST Fall to SCLK Fall
CNVST Pulse Width
Power-Up Time; Full Power-Down
Restart Time; Partial Power-Down
tCH
tCL
tDOUT
tDHOLD
tSETUP
tCSW
tPWR-UP
tRCV
VL = 1.8V to VDD
VL = 1.8V to VDD
CL = 30pF, VL = 4.75V to VDD
CL = 30pF, VL = 2.7V to VDD
CL = 30pF, VL = 1.8V to VDD
VL = 1.8V to VDD
VL = 1.8V to VDD
VL = 1.8V to VDD
15.6
15.6
4
10
20
2
16
ns
ns
14
17 ns
24
ns
ns
ns
ms
Cycles
Note 1: -40°C performance is guaranteed by design.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset
error have been nulled.
Note 3: No missing codes over temperature.
Note 4: Conversion time is defined as the number of clock cycles (16) multiplied by the clock period.
Note 5: At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz.
Note 6: The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris-
ing edge of SCLK and terminates on the next falling edge of CNVST. The IC idles in acquisition mode between conversions.
Note 7: Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance.
Note 8: Digital supply current is measured with the VIH level equal to VL, and the VIL level equal to GND.
CNVST
SCLK
tSETUP
DOUT
tCL tCH
tDHOLD
tDOUT
tCSW
Figure 1. Detailed Serial-Interface Timing
VL
DOUT
6k
DOUT
6kCL
GND
a) HIGH-Z TO VOH, VOL TO VOH,
AND VOH TO HIGH-Z
CL
GND
b) HIGH-Z TO VOL, VOH TO VOL,
AND VOL TO HIGH-Z
Figure 2. Load Circuits for Enable/Disable Times
4 _______________________________________________________________________________________



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