MAX1076 Datasheet PDF - Maxim Integrated Products

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MAX1076
Maxim Integrated Products

Part Number MAX1076
Description (MAX1076 / MAX1078) 10-Bit ADCs
Page 18 Pages


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19-3291; Rev 1; 4/09
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1.8Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
General Description
The MAX1076/MAX1078 are low-power, high-speed, seri-
al-output, 10-bit, analog-to-digital converters (ADCs) that
operate at up to 1.8Msps and have an internal reference.
These devices feature true-differential inputs, offering bet-
ter noise immunity, distortion improvements, and a wider
dynamic range over single-ended inputs. A standard
SPI™/QSPI™/MICROWIRE™ interface provides the clock
necessary for conversion. These devices easily interface
with standard digital signal processor (DSP) synchronous
serial interfaces.
The MAX1076/MAX1078 operate from a single +4.75V to
+5.25V supply voltage. The MAX1076/MAX1078 include
a 4.096V internal reference. The MAX1076 has a unipolar
analog input, while the MAX1078 has a bipolar analog
input. These devices feature a partial power-down mode
and a full power-down mode for use between conver-
sions, which lower the supply current to 2mA (typ) and
1µA (max), respectively. Also featured is a separate
power-supply input (VL), which allows direct interfacing to
+1.8V to VDD digital logic. The fast conversion speed,
low-power dissipation, excellent AC performance, and DC
accuracy (±0.5 LSB INL) make the MAX1076/MAX1078
ideal for industrial process control, motor control, and
base-station applications.
The MAX1076/MAX1078 come in a 12-pin TQFN pack-
age, and are available in the extended (-40°C to +85°C)
temperature range.
Data Acquisition
Bill Validation
Motor Control
Applications
Communications
Portable Instruments
Features
o 1.8Msps Sampling Rate
o Only 50mW (typ) Power Dissipation
o Only 1µA (max) Shutdown Current
o High-Speed, SPI-Compatible, 3-Wire Serial Interface
o 61dB S/(N + D) at 525kHz Input Frequency
o Internal True-Differential Track/Hold (T/H)
o Internal 4.096V Reference
o No Pipeline Delays
o Small 12-Pin TQFN Package
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
INPUT
MAX1076ETC+T -40°C to +85°C 12 TQFN
Unipolar
MAX1078ETC+T -40°C to +85°C 12 TQFN
Bipolar
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Pin Configuration
Typical Operating Circuit
TOP VIEW
AIN+ N.C. SCLK
12 11 10
AIN- 1
REF 2
RGND 3
MAX1076
MAX1078
9 CNVST
8 DOUT
7 VL
456
VDD N.C. GND
TQFN
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
+4.75V TO +5.25V
+1.8V TO VDD
10μF
DIFFERENTIAL +
INPUT
VOLTAGE -
4.7μF 0.01μF
0.01μF
VDD
0.01μF
VL
AIN+ DOUT
AIN-
MAX1076
MAX1078 CNVST
SCLK
REF
RGND
GND
10μF
μC/DSP
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.



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1.8Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V
VL to GND ................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Inputs
to GND .................-0.3V to the lower of (VDD + 0.3V) and +6V
Digital Output
to GND ....................-0.3V to the lower of (VL + 0.3V) and +6V
Analog Inputs and
REF to GND..........-0.3V to the lower of (VDD + 0.3V) and +6V
RGND to GND .......................................................-0.3V to +0.3V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA = +70°C)
12-Pin TQFN (derate 16.9mW/°C above +70°C) ......1349mW
Operating Temperature Range
MAX107_ ETC.................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
DC ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
SYMBOL
CONDITIONS
INL
DNL
(Note 1)
(Note 2)
MIN TYP MAX UNITS
10 Bits
±0.5 LSB
±0.5 LSB
±2 LSB
Offset-Error Temperature
Coefficient
±1 ppm/°C
Gain Error
Offset nulled
Gain Temperature Coefficient
DYNAMIC SPECIFICATIONS (fIN = 525kHz sine wave, VIN = VREF, unless otherwise noted.)
Signal-to-Noise Plus Distortion
SINAD
60
Total Harmonic Distortion
THD Up to the 5th harmonic
Spurious-Free Dynamic Range
SFDR
Intermodulation Distortion
IMD fIN1 = 250kHz, fIN2 = 300kHz
Full-Power Bandwidth
-3dB point, small-signal method
Full-Linear Bandwidth
S/(N + D) > 56dB, single ended
CONVERSION RATE
Minimum Conversion Time
tCONV (Note 3)
Maximum Throughput Rate
1.8
Minimum Throughput Rate
(Note 4)
10
Track-and-Hold Acquisition Time
Aperture Delay
tACQ (Note 5)
Aperture Jitter
(Note 6)
External Clock Frequency
fSCLK
±2 LSB
±2 ppm/°C
61 dB
-80 -74
dB
-80 -74
dB
-78 dB
20 MHz
2 MHz
0.556
µs
Msps
ksps
104 ns
5 ns
30 ps
28.8 MHz
2 _______________________________________________________________________________________



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1.8Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
ANALOG INPUTS (AIN+, AIN-)
Differential Input Voltage Range
Absolute Input Voltage Range
AIN+ - AIN-, MAX1076
VIN AIN+ - AIN-, MAX1078
0
-VREF / 2
0
VREF
+VREF / 2
VDD
V
V
DC Leakage Current
±1 µA
Input Capacitance
Per input pin
16 pF
Input Current (Average)
Time averaged at maximum throughput rate
75
µA
REFERENCE OUTPUT (REF)
REF Output Voltage Range
Voltage Temperature Coefficient
Static, TA = +25°C
4.086
4.096
±50
4.106
V
ppm/°C
Load Regulation
ISOURCE = 0 to 2mA
ISINK = 0 to 200µA
0.3
mV/mA
0.5
Line Regulation
VDD = 4.75V to 5.25V, static
0.5 mV/V
DIGITAL INPUTS (SCLK, CNVST)
Input-Voltage Low
VIL
0.3 x VL V
Input-Voltage High
Input Leakage Current
VIH
IIL
0.7 x VL
0.05
±10
V
µA
DIGITAL OUTPUT (DOUT)
Output Load Capacitance
COUT For stated timing performance
30 pF
Output-Voltage Low
Output-Voltage High
VOL
VOH
ISINK = 5mA, VL 1.8V
ISOURCE = 1mA, VL 1.8V
VL - 0.5V
0.4 V
V
Output Leakage Current
IOL Output high impedance
±0.2 ±10
µA
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
VDD
VL
4.75
1.8
5.25
VDD
V
V
Analog Supply Current,
Normal Mode
Static, fSCLK = 28.8MHz
IDD Static, no SCLK
Operational, 1.8Msps
8 11
5 7 mA
10 13
Analog Supply Current,
Partial Power-Down Mode
IDD
fSCLK = 28.8MHz
No SCLK
2
mA
2
Analog Supply Current,
Full Power-Down Mode
IDD
fSCLK = 28.8MHz
No SCLK
1
0.3 1
µA
Operational, full-scale input at 1.8Msps
1 2.5
Digital Supply Current (Note 7)
Static, fSCLK = 28.8MHz
Partial/full power-down mode,
fSCLK = 28.8MHz
0.4 1
mA
0.2 0.5
Static, no SCLK (all modes)
0.1 1
µA
Positive-Supply Rejection
PSR VDD = 5V ±5%, full-scale input
±0.2 ±3.0
mV
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1.8Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Pulse-Width High
tCH VL = 1.8V to VDD
15.6 ns
SCLK Pulse-Width Low
SCLK Rise to DOUT Transition
tCL
tDOUT
VL = 1.8V to VDD
CL = 30pF, VL = 4.75V to VDD
CL = 30pF, VL = 2.7V to VDD
15.6 ns
14
17 ns
DOUT Remains Valid After SCLK
tDHOLD
CL = 30pF, VL = 1.8V to VDD
VL = 1.8V to VDD
24
4 ns
CNVST Fall to SCLK Fall
tSETUP VL = 1.8V to VDD
10 ns
CNVST Pulse Width
tCSW VL = 1.8V to VDD
20 ns
Power-Up Time; Full Power-Down
Restart Time; Partial Power-Down
tPWR-UP
tRCV
2 ms
16 Cycles
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset
error have been nulled.
Note 2: No missing codes over temperature.
Note 3: Conversion time is defined as the number of clock cycles (16) multiplied by the clock period.
Note 4: At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz.
Note 5: The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris-
ing edge of SCLK and terminates on the next falling edge of CNST. The IC idles in acquisition mode between conversions.
Note 6: Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance.
Note 7: Digital supply current is measured with the VIH level equal to VL, and the VIL level equal to GND.
CNVST
SCLK
tSETUP
DOUT
tCL tCH
tDHOLD
tDOUT
Figure 1. Detailed Serial-Interface Timing
VL
tCSW
DOUT
6kΩ
DOUT
6kΩ CL
GND
a) HIGH-Z TO VOH, VOL TO VOH,
AND VOH TO HIGH-Z
CL
GND
b) HIGH-Z TO VOL, VOH TO VOL,
AND VOL TO HIGH-Z
Figure 2. Load Circuits for Enable/Disable Times
4 _______________________________________________________________________________________



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