MAX107 Datasheet PDF - Maxim

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MAX107
Maxim

Part Number MAX107
Description Dual / 6-Bit / 400Msps ADC with On-Chip / Wideband Input Amplifier
Page 21 Pages


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19-2007; Rev 0; 5/01
Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
General Description
The MAX107 is a dual, 6-bit, analog-to-digital converter
(ADC) designed to allow fast and precise digitizing of in-
phase (I) and quadrature (Q) baseband signals. The
MAX107 converts the analog signals of both I and Q
components to digital outputs at 400Msps while achiev-
ing a signal-to-noise ratio (SNR) of typically 37dB with
an input frequency of 125MHz, and an integral nonlin-
earity (INL) and differential nonlinearity (DNL) of ±0.25
LSB. The MAX107 analog input preamplifiers feature a
400MHz, -0.5dB, and a 1.5GHz, -3dB analog input
bandwidth. Matching channel-to-channel performance
is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees
phase. Dynamic performance is 36.7dB signal-to-noise
plus distortion (SINAD) with a 125MHz analog input sig-
nal and a sampling speed of 400MHz. A fully differential
comparator design and encoding circuits reduce out-of-
sequence errors, and ensure excellent metastable per-
formance of only one error per 1016 clock cycles.
In addition, the MAX107 provides LVDS digital outputs
with an internal 6:12 demultiplexer that reduces the out-
put data rate to one-half the sample clock rate. Data is
output in two’s complement format. The MAX107 oper-
ates from a +5V analog supply and the LVDS output
ports operate at +3.3V. The data converter’s typical
power dissipation is 2.6W. The device is packaged in
an 80-pin, TQFP package with exposed paddle, and is
specified for the extended (-40°C to +85°C) tempera-
ture range. For a higher-speed, 800Msps version of the
MAX107, please refer to the MAX105 data sheet.
VSAT Receivers
WLANs
Test Instrumentation
Communications Systems
Applications
Features
o Two Matched 6-Bit, 400Msps ADCs
o Excellent Dynamic Performance
36.7dB SINAD at fIN 125MHz and
fCLK 400MHz
o Typical INL and DNL: ±0.25LSB
o Channel-to-Channel Phase Matching: ±0.2°
o Channel-to-Channel Gain Matching: ±0.04dB
o 6:12 Demultiplexer reduces the Data Rates to
200MHz
o Low Error Rate: 1016 Metastable States at
400Msps
o LVDS Digital Outputs in Two’s Complement
Format
PART
MAX107ECS
Ordering Information
TEMP. RANGE
-40°C to +85°C
PIN-PACKAGE
80-Pin TQFP-EP
Block Diagram
I ADC
I
PRIMARY
PORT
I
AUXILIARY
PORT
MAX107
REF
Pin Configuration appears at end of data sheet.
Q ADC
Q
PRIMARY
PORT
Q
AUXILIARY
PORT
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.



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Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
ABSOLUTE MAXIMUM RATINGS
AVCC, AVCCI, AVCCQ and AVCCR to AGND............-0.3V to +6V
OVCCI and OVCCQ to OGND ...................................-0.3V to +4V
AGND to OGND ................................................... -0.3V to +0.3V
P0I± to P5I± and A0I± to A5I±
DREADY+, DREADY- to OGNDI ..............-0.3V to OVCCI+0.3V
P0Q± to P5Q±, A0Q± to A5Q±
DOR+ and DOR- to OGNDQ .................-0.3V to OVCCQ+0.3V
REF to AGNDR...........................................-0.3V to AVCCR+0.3V
Differential Voltage Between INI+ and INI- ....................-2V, +2V
Differential Voltage Between INQ+ and INQ-.................-2V, +2V
Differential Voltage Between CLK+ and CLK- ...............-2V, +2V
Maximum Current Into Any Pin ...........................................50mA
Continuous Power Dissipation (TA = +70°C)
80-Pin TQFP (derate 44mW/°C above +70°C)..................3.5W
Operating Temperature Range
MAX107ECS .....................................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead temperature (soldering, 10s) ..................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVCC = AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, fCLK = 401.408MHz, CL = 1µF to AGND at REF, RL = 100±1% applied to digital LVDS outputs, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C)
PARAMETER
SYMBOL
DC ACCURACY
Resolution
RES
Integral Nonlinearity (Note 1)
INL
Differential Nonlinearity
(Note 1)
DNL
Offset Voltage
Offset Matching Between ADCs
VOS
OM
ANALOG INPUTS (INI+, INI-, INQ+, INQ-)
Input Open-Circuit Voltage
VAOC
Input Open-Circuit Voltage
Matching
CONDITIONS
No missing codes guaranteed
(Note 2)
(Note 2)
(VINI+ - VIN-) - (VINQ+ - VINQ-)
MIN TYP MAX UNITS
6
-1 ±0.2 1
-1 ±0.25 1
-1 ±0.25 1
-0.5 ±0.1
0.5
Bits
LSB
LSB
LSB
LSB
2.4 2.5 2.6
V
±7.5 mV
Common Mode Input Voltage
Range (Note 3)
VCM
Signal + Offset w.r.t. AGND
1.85 3.05 V
Full-Scale Analog Input
Voltage Range (Note 4)
Input Resistance
Input Capacitance
Input Resistance Temperature
Coefficient
Full-Power Analog Input BW
REFERENCE OUTPUT
Reference Output Resistance
Reference Output Voltage
VFSR
RIN
CIN
TCRIN
FPBW-0.5dB
RREF
VREF
Referenced to AGNDR
ISOURCE = 500µA
0.76 0.8 0.84 Vp-p
1.7 2
1.5
k
pF
150 ppm/°C
400 MHz
2.45
5
2.50
2.55
V
2 _______________________________________________________________________________________



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Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(AVCC = AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, fCLK = 401.408MHz, CL = 1µF to AGND at REF, RL = 100±1% applied to digital LVDS outputs, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C)
PARAMETER
CLOCK INPUTS (CLK+, CLK-)
Clock Input Resistance
Clock Input Resistance
Temperature Coefficient
SYMBOL
RCLK
TCRCLK
CONDITIONS
CLK+ and CLK- to AGND
MIN TYP MAX UNITS
5 k
150 ppm/°C
Minimum Clock Input
Amplitude
500
LVDS OUTPUTS (P0I± TO P5I±, P0Q± TO P5Q±, A0I± TO A5I±, A0Q± TO A5Q±, DREADY+, DREADY-, DOR+, DOR-)
Differential Output Voltage
VOD
247 400
Change in Magnitude of VOD
Between 0and 1States
∆VOD
±25
mVp-p
mV
mV
Steady-State Common Mode
Output Voltage
VOC(SS)
1.125
1.375
V
Change in Magnitude of VOC
Between 0and 1States
Differential Output Resistance
Output Current
DYNAMIC SPECIFICATION
Effective Number of Bits
(Note 8)
∆VOC
Short output together
Short to OGNDI = OGNDQ
ENOB
fIN = 124.999MHz at
-0.5dB FS (Note 9)
fIN = 200.067MHz at
-0.5dB FS
Differential
Single-ended
Differential
±25
80 160
2.5
25
5.4 5.9
5.9
5.75
mV
mA
Bits
Signal-to-Noise Ratio
(Notes 10, 11)
SNR
fIN = 124.999MHz at
-0.5dB FS (Note 9)
fIN = 200.067MHz at
-0.5dB FS
Differential
Single-ended
Differential
35 37
37
36.6
dB
Total Harmonic Distortion
(Note 11)
Spurious-Free Dynamic Range
THD
SFDR
fIN = 124.999MHz at
-0.5dB FS (Note 9)
fIN = 200.067MHz at
-0.5dB FS
fIN = 124.999MHz at
-0.5dB FS (Note 9)
fIN = 200.067MHz at
-0.5dB FS
Differential
Single-ended
Differential
Differential
Single-ended
Differential
-49.5
-49.5
-42
-44.5
43 51
51
45.5
dBc
dB
_______________________________________________________________________________________ 3



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Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(AVCC = AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, fCLK = 401.408MHz, CL = 1µF to AGND at REF, RL = 100±1% applied to digital LVDS outputs, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C)
PARAMETER
Signal-to-Noise Plus Distortion
Ratio
SYMBOL
SINAD
CONDITIONS
fIN = 124.999MHz at
-0.5dB FS (Note 9)
Differential
Single-ended
fIN = 200.067MHz at
-0.5dB FS
Differential
MIN TYP MAX UNITS
35 36.7
36.7
dB
36
Two-Tone Intermodulation
TTIMD
fIN1 = 100.009MHz, fIN2 = 102.067MHz at
-7dBFS
-55 dBc
Crosstalk Between ADCs
Gain Match Between ADCs
Phase Match Between ADCs
Metastable Error Rate
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current
Output Supply Current
Analog Power Dissipation
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
TIMING CHARACTERISTICS
Maximum Sample Rate
Clock Pulse Width Low
Clock Pulse Width High
Aperture Delay
Aperture Jitter
CLK-to-DREADY Propagation
Delay
XTLK
GM
PM
fINI = 200.0180MHz, fINQ = 210.0140MHz
at -0.5dB FS
(Note 12)
(Note 12)
AVCC_
OVCC_
ICC
OICC
PDISS
CMRR
PSRR
AVCC = AVCCI = AVCCQ = AVCCR
OVCC I = OVCC Q
ICC = AICC R + AICC I + AICC Q + AICC
OICC = OICC I + OICC Q
VIN_+ = VIN_- = ±0.1V (Note 6)
AVCC = AVCC I = AVCC Q = AVCC R =
+4.75V to +5.25V (Note 7)
fMAX
tPWL
tPWH
tAD
tAJ
tPD1
(Note 13)
-70
-0.3 ±0.04 +0.3
-2 ±0.2 +2
Less than 1 in 1016
dB
dB
deg
Clock
Cycles
5 ±5%
3.3 ±10%
250 320
400 510
2.6
40 60
40 57
V
V
mA
mA
W
dB
dB
400
1.25
1.25
100
1.5
1.5
Msps
ns
ns
ps
psRMS
ns
DREADY-to-DATA
Propagation Delay
tPD2 (Notes 5, 13)
0
120 300
ps
4 _______________________________________________________________________________________



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