ISL8700 Datasheet PDF - Intersil

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ISL8700
Intersil

Part Number ISL8700
Description Adjustable Quad Sequencer
Page 13 Pages


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®
Data Sheet
ISL8700, ISL8701, ISL8702
March 21, 2008
FN9250.2
Adjustable Quad Sequencer
The ISL8700, ISL8701, ISL8702 family of ICs provide four
delay adjustable sequenced outputs while monitoring an
input voltage all with a minimum of external components.
High performance DSP, FPGA, µP and various subsystems
require input power sequencing for proper functionality at
initial power-up and the ISL870x provides this function while
monitoring the distributed voltage for over and undervoltage
compliance.
The ISL8700 and ISL8701 operate over the +2.5V to +24V
nominal voltage range, whereas the ISL8702 operates over
the +2.5V to +12V nominal voltage range. All three have a
user adjustable time from UV and OV voltage compliance to
sequencing start via an external capacitor when in auto start
mode and adjustable time delay to subsequent ENABLE
output signal via external resistors.
Additionally, the ISL8702 provides an input for sequencing
on and off operation (SEQ_EN) and for voltage window
compliance reporting (FAULT) over the +2.5V to +12V
voltage range.
Easily daisy chained for more than 4 sequenced signals.
Altogether, the ISL870x provides these adjustable features
with a minimum of external BOM. See Figure 1 for typical
implementation.
Ordering Information
PART NUMBER PART
TEMP. PACKAGE PKG.
(Note)
MARKING RANGE (°C) (Pb-free) DWG. #
ISL8700IBZ* ISL 8700IBZ -40 to +85 14 Ld SOIC M14.15
ISL8701IBZ* ISL 8701IBZ -40 to +85 14 Ld SOIC M14.15
ISL8702IBZ* ISL 8702IBZ -40 to +85 14 Ld SOIC M14.15
ISL870xEVAL1 Evaluation Platform
*Add “-T” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Adjustable Delay to Subsequent Enable Signal
• Adjustable Delay to Sequence Auto Start
• Adjustable Distributed Voltage Monitoring
• Undervoltage and Overvoltage Adjustable Delay to Auto
Start Sequence
• I/O Options
ENABLE (ISL8700, ISL8702) and ENABLE# (ISL8701)
SEQ_EN (ISL8702)
• Voltage Compliance Fault Output
• Pb-Free (RoHS Compliant)
Applications
• Power Supply Sequencing
• System Timing Function
2.5V TO 24V (2.5V TO 12V FOR ISL8702)
Ru VIN ENABLE_A
SEQ_EN*
ENABLE_B
ENABLE_C
UV ENABLE_D
Rm
OV
FAULT*
GND TB TC TD TIME
Rl
EN
DC/DC
Vo1
EN
DC/DC
Vo2
EN
DC/DC
Vo3
EN
DC/DC
Vo4
* SEQ_EN and FAULT are not available on ISL8700 and ISL8701
FIGURE 1. ISL870x IMPLEMENTATION
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.



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Pinouts
ISL8700
(14 LD SOIC)
TOP VIEW
ENABLE_D 1
ENABLE_C 2
ENABLE_B 3
ENABLE_A 4
OV 5
UV 6
GND 7
14 VIN
13 TD
12 TC
11 TB
10 TIME
9 NC
8 NC
ISL8700, ISL8701, ISL8702
ISL8701
(14 LD SOIC)
TOP VIEW
ENABLE#_D 1
ENABLE#_C 2
ENABLE#_B 3
ENABLE#_A 4
OV 5
UV 6
GND 7
14 VIN
13 TD
12 TC
11 TB
10 TIME
9 NC
8 NC
ISL8702
(14 LD SOIC)
TOP VIEW
ENABLE_D 1
ENABLE_C 2
ENABLE_B 3
ENABLE_A 4
OV 5
UV 6
GND 7
14 VIN
13 TD
12 TC
11 TB
10 TIME
9 SEQ_EN
8 FAULT
2 FN9250.2
March 21, 2008



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ISL8700, ISL8701, ISL8702
Absolute Maximum Ratings
ISL8700, ISL8701 VIN, ENABLE(#), FAULT . . . . . . . . 27V, to -0.3V
ISL8702 VIN, ENABLE(#), FAULT . . . . . . . . . . . . . . . . 14V, to -0.3V
TIME, TB, TC, TD, UV, OV . . . . . . . . . . . . . . . . . . . . . +6V, to -0.3V
SEQ_EN(#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIN+0.3V, to -0.3V
ENABLE, ENABLE # Output Current . . . . . . . . . . . . . . . . . . . 10mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage Range (Nominal). . . . . . . . . . . . . . . . . . 2.5V to 24V
ISL8702 Supply Voltage Range (Nominal) . . . . . . . . . . 2.5V to 12V
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
14 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package) . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER
Nominal VIN = 2.5V to +24V, TA = TJ = -40°C to +85°C, Unless Otherwise Specified.
ISL8702 VIN = 2.5V to +12V
SYMBOL
TEST CONDITIONS
MIN TYP
UV AND OV INPUTS
UV/OV Rising Threshold
UV/OV Falling Threshold
UV/OV Hysteresis
UV/OV Input Current
TIME, ENABLE/ENABLE# OUTPUTS
VUVRvth
VUVFvth
VUVhys
IUV
VUVRvth - VUVFvth
1.16
1.06
-
-
1.21
1.10
104
10
TIME Pin Charging Current
TIME Pin Threshold
Time from VIN Valid to ENABLE_A
Time from VIN Invalid to Shutdown
ENABLE Output Resistance
ITIME
VTIME_VTH
tVINSEQpd SEQ_EN = high, CTIME = open
tVINSEQpd_10 SEQ_EN = high, CTIME = 10nF
tVINSEQpd500 SEQ_EN = high, CTIME = 500nF
tshutdown UV or OV to simultaneous shutdown
REN
IENABLE = 1mA
- 2.6
1.9 2.0
- 30
- 7.7
- 435
--
- 100
ENABLE Output Low
ENABLE Pull-Down Current
Delay to Subsequent ENABLE Turn-On/Off
SEQUENCE ENABLE AND FAULT I/O
Vol
Ipulld
tdel_120
tdel_3
tdel_0
IENABLE = 1mA
ENABLE = 1V
RTX = 120kΩ
RTX = 3kΩ
RTX = 0Ω
- 0.1
10 15
155 195
3.5 4.7
- 0.5
VIN Valid to FAULT Low
VIN Invalid to FAULT High
FAULT Pull-down Current
tFLTL
tFLTH
FAULT = 1V
15 30
- 0.5
10 15
SEQ_EN Pull-up Voltage
SEQ_EN Low Threshold Voltage
SEQ_EN High Threshold Voltage
Delay to ENABLE_A Deasserted
VSEQ
SEQ_EN open
VilSEQ_EN
VihSEQ_EN
tSEQ_EN_ENA SEQ_EN low to ENABLE_A low
- VIN
--
1.2 -
- 0.2
MAX
1.28
1.18
-
-
-
2.25
-
-
-
1
-
-
-
240
6
-
50
-
-
-
0.3
-
1
UNIT
V
V
mV
nA
µA
V
µs
ms
ms
µs
Ω
V
mA
ms
ms
ms
µs
µs
mA
V
V
V
µs
3 FN9250.2
March 21, 2008



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ISL8700, ISL8701, ISL8702
Electrical Specifications
PARAMETER
BIAS
IC Supply Current
VIN Power On Reset
Nominal VIN = 2.5V to +24V, TA = TJ = -40°C to +85°C, Unless Otherwise Specified.
ISL8702 VIN = 2.5V to +12V (Continued)
SYMBOL
TEST CONDITIONS
MIN TYP
IVIN_2.2V
IVIN_12V
IVIN_24V
VIN_POR
VIN = 2.2V
VIN = 12V
VIN = 24V
VIN low to high
- 191
- 246
- 286
- 2.08
MAX
-
400
-
2.5
UNIT
µA
µA
µA
V
Pin Descriptions
PIN NUMBER
ISL8700 ISL8701 ISL8702 PIN NAME
FUNCTION DESCRIPTION
NA 1 NA ENABLE#_D Active low open drain sequenced output. Sequenced on after ENABLE#_C and first output to
sequence off for the ISL8701. Tracks VIN upon bias.
1 NA 1 ENABLE_D Active high open drain sequenced output. Sequenced on after ENABLE_C and first output to
sequence off for the ISL8700, ISL8702. Pulls low with VIN < 1V.
NA 2 NA ENABLE#_C Active low open drain sequenced output. Sequenced on after ENABLE#_B and sequenced off after
ENABLE#_D for the ISL8701. Tracks VIN upon bias.
2 NA 2 ENABLE_C Active high open drain sequenced output. Sequenced on after ENABLE_B and sequenced off after
ENABLE_D for the ISL8700, ISL8702. Pulls low with VIN < 1V.
NA 3 NA ENABLE#_B Active low open drain sequenced output. Sequenced on after ENABLE#_A and sequenced off after
ENABLE#_C for the ISL8701. Tracks VIN upon bias.
3 NA 3 ENABLE_B Active high open drain sequenced output. Sequenced on after ENABLE_A and sequenced off after
ENABLE_C for the ISL8700, ISL8702. Pulls low with VIN < 1V.
NA 4 NA ENABLE#_A Active low open drain sequenced output. Sequenced on after CTIME period and sequenced off after
ENABLE#_B for the ISL8701. Tracks VIN upon bias.
4 NA 4 ENABLE_A Active high open drain sequenced output. Sequenced on after CTIME period and sequenced off after
ENABLE_B for the ISL8700, ISL8702. Pulls low with VIN < 1V.
55 5
OV The voltage on this pin must be under its 1.22V Vth or the four ENABLE outputs will be immediately
pulled down. Conversely the 4 ENABLE# outputs will be released to be pulled high via external pull
ups.
66 6
UV The voltage on this pin must be over its 1.22V Vth or the four ENABLE outputs will be immediately
pulled down. Conversely the 4 ENABLE# outputs will be released to be pulled high via external pull
ups.
77 7
GND
IC ground.
NA NA
8
FAULT
The VIN voltage when not within the desired UV to OV window will cause FAULT to be released to be
pulled high to a voltage equal to or less than VIN via an external resistor.
NA NA 9 SEQ_EN This pin provides a sequence on signal input with a high input. Internally pulled high to VIN.
NA NA NA SEQ_EN# This pin provides a sequence on signal input with a low input. Internally pulled high to VIN.
10 10 10
TIME
This pin provides a 2.6µA current output so that an adjustable VIN valid to sequencing on and off start
delay period is created with a capacitor to ground.
11 11 11
TB A resistor connected from this pin to ground determines the time delay from ENABLE_A being active
to ENABLE _B being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
12 12 12
TC A resistor connected from this pin to ground determines the time delay from ENABLE_B being active
to ENABLE _C being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
13 13 13
TD A resistor connected from this pin to ground determines the time delay from ENABLE_C being active
to ENABLE _D being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
14 14 14
VIN IC Bias Pin Nominally 2.5V to 24V (2.5V to 12V for ISL8702). This pin requires a 1µF decoupling
capacitor close to IC pin.
4 FN9250.2
March 21, 2008



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