IR3529 Datasheet PDF - International Rectifier


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IR3529
International Rectifier

Part Number IR3529
Description XPHASE3 PHASE IC
Page 22 Pages

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IR3529
DATA SHEET
XPHASE3TM PHASE IC
DESCRIPTION
The IR3529 Phase IC combined with an IR XPhase3TM Control IC provides a full featured and flexible way to
implement power solutions for the latest high performance CPUs and ASICs. The “Control” IC provides overall
system control and interfaces with any number of “Phase” ICs which each drive and monitor a single phase of a
multiphase converter. The XPhase3TM architecture results in a power supply that is smaller, less expensive, and
easier to design while providing higher efficiency than conventional approaches.
The IR3529 provides two types of current sense outputs; ILL which contains average power supply current,
information which can be used for voltage positioning and ISHARE which contains average active phase current
information since current sense amplifiers of respective phases are disabled when in power savings mode. Higher
efficiency can be expected due to increased driver capability along with reduced non-overlap durations. Turbo is
included to improve load turn-on response. A SHIFT pin now communicates to the control IC a change in phase
IC on-line status resulting in controlled phase timing during PSI and Phase Shedding. The IR3529 also
implements cycle-by-cycle over current protection to resolve high repetition rate load transients.
FEATURES
Reduced dead time
7V gate drivers (6A GATEL sink current, 4A GATEH sink current)
Turbo Mode load turn-on response enhancement
Programmable cycle-by-cycle over current limit protection
Phase status communicated to control IC for controlled phase timing during PSI and Phase Shedding
Power State Indicator (PSI) interface provides the capability to maximize the efficiency at light loads.
Anti-bias circuitry
Support converter output voltage up to 5.1 V (Limited to VCCL-1.8V)
Loss-less inductor current sensing
Phase delay DFF bypassed during PSI assertion mode to improve output ripple performance
Over-current protection during PSI assertion mode operation
Feed-forward voltage mode control
Integrated boot-strap synchronous PFET
Only four external components per phase
3 wire analog bus connects Control and Phase ICs (VID, Error Amp, Average Power Supply Current)
3 wire digital bus for accurate daisy-chain phase timing control without external components
Debugging function isolates phase IC from the converter
Self-calibration of PWM ramp, current sense amplifier, and current share amplifier
Single-wire bidirectional average current sharing
Small thermally enhanced 20L 4 X 4mm MLPQ package
RoHS compliant
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APPLICATION CIRCUIT
12V
VCCL
EAIN
ISHARE
ILL
PSI#
DACIN
PHSIN
SHIFT
PHSOUT
CLKIN
1 ILL
2 PSI#
3 DACIN
4 LGND
5 PHSIN
IR3529
SW
GATEH
BOOST
VCCL
OCSET
15
14
13
12
11
ROCSET
COCSET
CBST
CVCCL1
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IR3529
RCS
CCS
L
VOUT+
COUT
VOUT-
Figure 1 Single Phase Application Circuit
ORDERING INFORMATION
Part Number
IR3529MTRPBF
* IR3529MPBF
* Samples only
Package
20 Lead MLPQ
(4 x 4 mm body)
20 Lead MLPQ
(4 x 4 mm body)
Order Quantity
3000 per reel
100 piece strips
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IR3529
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications are not implied.
Operating Junction Temperature…………….. 0 to 150oC
Storage Temperature Range………………….-65oC to 150oC
MSL Rating………………………………………2
Reflow Temperature…………………………….260oC
PIN #
1
2
3
4
5
6
7
8
9
PIN NAME
ILL
PSI#
DACIN
LGND
PHSIN
SHIFT
PHSOUT
CLKIN
PGND
VMAX
7.5V
7.5V
3.3V
n/a
7.5V
7.5V
7.5V
7.5V
0.3V
10 GATEL
7.5V
11 OCSET
12 VCCL
25V
7.5V
13 BOOST
40V
14 GATEH
40V
15 SW
34V
16
17
18
19
20
Note:
1.
2.
3.
4.
VCC
CSIN+
CSIN-
EAIN
ISHARE
25V
7.5V
7.5V
7.5V
7.5V
Maximum GATEH – SW = 8V
Maximum BOOST – GATEH = 8V
Maximum OCSET = VCC
Maximum SW – VCC = 9V
VMIN
-0.3V
-0.3V
-0.3V
n/a
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V DC, -5V for
100ns
-0.3V
-0.3V
-0.3V
-0.3V DC, -5V for
100ns
-0.3V DC, -5V for
100ns
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
ISOURCE
1mA
1mA
1mA
n/a
1mA
2mA
2mA
1mA
5A for 100ns,
200mA DC
5A for 100ns,
200mA DC
1mA
n/a
1A for 100ns,
100mA DC
3A for 100ns,
100mA DC
3A for 100ns,
100mA DC
n/a
1mA
1mA
1mA
1mA
ISINK
1mA
1mA
1mA
n/a
1mA
2mA
2mA
1mA
n/a
5A for 100ns,
200mA DC
1mA
5A for 100ns,
200mA DC
3A for 100ns,
100mA DC
3A for 100ns,
100mA DC
n/a
10mA
1mA
1mA
1mA
1mA
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IR3529
RECOMMENDED OPERATING CONDITIONS FOR RELIABLE OPERATION WITH MARGIN
8.0V VCC 16V, 4.75V VCCL 7.5V, 0 oC TJ 125 oC. 0.5V V(DACIN) 1.6V, 500kHz CLKIN 9MHz,
250kHz PHSIN 1.5MHz.
ELECTRICAL CHARACTERISTICS
The electrical characteristics involve the spread of values guaranteed within the recommended operating
conditions. Typical values represent the median values, which are related to 25°C.
CGATEH = 3.3nF, CGATEL = 6.8nF (unless otherwise specified)
PARAMETER
Gate Drivers
GATEH Source Resistance
GATEH Sink Resistance
GATEL Source Resistance
GATEL Sink Resistance
GATEH Source Current
GATEH Sink Current
GATEL Source Current
GATEL Sink Current
GATEL low to GATEH high
delay
GATEH low to GATEL high
delay
PWM Comparator
PWM Ramp Slope
TEST CONDITION
BOOST – SW = 7V.
BOOST – SW = 7V.
VCCL – PGND = 7V.
VCCL – PGND = 7V.
BOOST=7V, GATEH=2.5V, SW=0V.
BOOST=7V, GATEH=2.5V, SW=0V.
VCCL=7V, GATEL=2.5V, PGND=0V.
VCCL=7V, GATEL=2.5V, PGND=0V.
BOOST = VCCL = 7V, SW = PGND = 0V,
measure time from GATEL falling to 1V to
GATEH rising to 1V
BOOST = VCCL = 7V, SW = PGND = 0V,
measure time from GATEH falling to 1V to
GATEL rising to 1V
Vin=12V
MIN
5
5
42
EAIN Bias Current
Minimum Pulse Width
Minimum GATEH Turn-off
Time
Daisy Chain Timing
CLKIN Bias Current
CLKIN Phase Delay
PHSIN Pull-Down
Resistance
PHSOUT High Voltage
PHSOUT Low Voltage
Down SHIFT Pulse width
Up SHIFT Pulse width
SHIFT Resistance to Rails
Current Sense Amplifier
CSIN+/- Bias Current
0 EAIN 3V
Note 1
-25
20
CLKIN = V(VCCL)
Measure time from CLKIN<1V to GATEH>1V
I(PHSOUT)=-10mA, measure VCCL–
PHSOUT
I(PHSOUT) = 10mA
47pF load, 27% VCCL
47pF load, 77% VCCL
-0.5
40
30
1
25
25
20
I(CSINM) measured with I(CSINM) sink
turned off (i.e. within 8us of CLKIN fall and
EAIN above Body Brake Threshold and
CSINM above 75% DACIN)
-200
TYP
670
670
670
300
3
4
4
6
15
15
52.5
-15
55
80
0.0
75
100
0.6
0.4
50
50
50
0
MAX
25
25
57
-5
70
160
0.5
125
170
1
75
75
80
200
Page 4 of 22
February 12, 2010
UNIT
m
m
m
m
A
A
A
A
ns
ns
mV/
%DC
µA
ns
ns
µA
ns
k
V
V
ns
ns
k
nA




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