IOT7210 Datasheet PDF - ETC

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IOT7210
ETC

Part Number IOT7210
Description Low Power CMOS IEEE 488 Controller Device
Page 12 Pages


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IOT7210
Low-Power CMOS IEEE 488 Controller Device
NEW
Features
• Completely meets IEEE Standard
488-1978:
- SH1, source handshake
- AH1, acceptor handshake
- T5 or TE5, talker or extended talker
- L3 or LE3, listener or extended
listener
- SR1, service request
www.DataSh-eeRt4LU1.c, ormemote local
- PP1 or PP2, parallel poll, remote, or
local configuration
- DC1, device clear
- DT1, device trigger
- C1-C5, controller, all functions
• Programmable data transfer rate
• 16 registers, 8 read/8 write
• 2 address registers: detect MTA,
MLA, MSA (my talk/my listen/my
secondary addresses) and provide 2
device addresses
• End-of-string (EOS) message auto-
matic detection
• Automatic (IEEE Standard 488-78)
command processing and undefined
command read capability
• DMA-capable
• Programmable bus transceiver I/O
specification, Texas Instruments/
Motorola/Intel-compatible
• 1 MHz to 8 MHz clock range
• TTL-compatible
• CMOS
• +5V single power supply
• 40-pin plastic DIP or 44-pin plastic
TQFP
• 8080/85/86-compatible
The IOT7210 low-power CMOS intelligent
IEEE 488 controller meets all the functional
requirements for talkers, listeners, and
controllers as specified by the IEEE Stan-
dard 488-1978. It completely duplicates
the NEC µPD7210’s function and provides
enhancements such as lower power con-
sumption and increased speed. Fully com-
patible with most processor architectures,
the IOT7210 requires only the addition of
the bus driver/receiver components to
implement any IEEE 488 interface.
In its 40-pin plastic DIP package, the
IOT7210 provides users with a drop-in
replacement for the µPD7210 and elimi-
nates the need for either software or hard-
ware modifications. It is also available in
The IOT7210 is an enhanced replacement for the NEC µPD7210 IEEE 488 controller device
a 44-pin, 1.27 mm thick plastic TQFP
package for surface-mount applications.
IOT7210 Operation on
the IEEE 488 Bus
Since its introduction in the 1970s, the
IEEE 488 standard has become the most
popular means of interconnecting instru-
ments and controllers. This highly so-
phisticated standard has been refined over
the years to provide a great degree of
flexibility, permitting it to meet most
instrumentation requirements.
The IEEE 488 bus uses a common set of data
and control lines to interconnect up to 15
devices. The device’s capabilities are classi-
fied as a combination of talker, listener,
and/or controller. Devices that incorporate
the IOT7210 can perform all three func-
tions—talker, listener, and controller.
Data is transferred on the IEEE 488 bus in
a bit-parallel, byte-serial fashion over eight
bidirectional data lines. A 3-wire hand-
shake ensures synchronization of trans-
mission and reception and allows more
than one device to receive data at the
same time, with the slowest device con-
trolling the data rate. Other control lines
perform a variety of functions, such as
device addressing and interrupt genera-
tion. In addition to providing all the
control and data lines necessary for IEEE
488 operation, the IOT7210 provides a
flexible interface to the standard IEEE 488
transceivers.
The IOT7210 implements all the func-
tions (including timing) that are required
to interface to the IEEE 488 bus and pro-
vides high-level bus protocol manage-
ment, which frees the host processor for
other tasks. By performing these func-
tions in dedicated hardware, the IOT7210
ensures bus compatibility with other IEEE
488 devices.
The IOT7210 is controlled by its 16 inter-
nal registers. To reduce CPU overhead,
bus data bytes can be transferred to and
from the IOT7210 using DMA. The
IOT7210’s DMA feature is generic enough
that it can be used to interface to most
processors and buses.
1



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Pin Configurations
Pin No.
DIP (TQFP)
1 (40)
2 (41)
3 (42)
www.DataSheet4U.com
4 (43)
5 (44)
6 (1)
7 (2)
8 (3)
9 (4)
10 (5)
11 (6)
12-19
(8-11,
13-16)
20
(7, 17,
25, 34)
21-23 (18-20)
24 (21)
25 (22)
26 (23)
27 (24)
28-35 (26-33)
36 (35)
37 (36)
38 (37)
39 (38)
40 (12, 39)
Symbol
T/R1
T/R2
CLK
RESET
T/R3
DRQ
DACK
CS
RD
WR
INT,
INT
D0 - D7
GND
I/O Functions
O
Transmit/Receive Control. Input/output control
signal for the IEEE 488 bus transceivers.
Transmit/Receive Control. The values of TRM1and
O TRM0 of the address mode register control the
functions of T/R2 and T/R3.
Clock. 1 MHz to 8 MHz reference clock for
I generating the state change prohibit times T1, T6,
T7, T8, specified in IEEE Standard 488-1978.
I
Reset. Resets the IOT7210 to an idle state when
high (active high).
O Transmit/Receive Control. See T/R2.
O
DMA Request. Requests data transfer. Becomes
low on input of DMA acknowledge signal DACK.
DMA Acknowledge. Active low. Connects the data
I bus (D0 - D7) to the byte in or data out register of
the IOT7210.
Chip Select. Active low. Enables access to the
I register selected by RS0 - RS2 (read or write
operation).
I
Read. Active low. Places contents of read register
specified RS0 - RS2 on D0 - D7 (computer bus).
I
Write. Active low. Writes data on D0 - D7 into the
write register specified by RS0 - RS2.
Interrupt Request. Active high/low. Becomes active
O
due to any 1 of 13 internal interrupt conditions
(unmasked). Active state software configurable.
Active high on chip reset.
I/O
Data Bus. 8-bit bidirectional data bus for interface
to the computer system.
Ground.
RS0 - RS2
I
Register Select. Select one of eight read (write)
registers during a read (write) operation.
IFC
I/O
Interface Clear. IEEE 488 control line. Clears the
interface functions.
REN
I/O
Remote Enable. IEEE 488 control line. Selects
remote or local control of the devices.
ATN
Attention. IEEE 488 control line. Indicates whether
I/O data on DIO lines is an interface message or device
dependent message.
SRQ
I/O
Service Request. IEEE 488 control line. Requests
the service from the controller.
DIO1 - DIO8
I/O
Data Input/Output. IEEE 488 8-bit bi-directional
bus for transfer of message.
DAV
I/O
Data Valid. IEEE 488 handshake line. Indicates
that data on DIO lines is valid.
NRFD
I/O
Ready for Data. IEEE 488 handshake line. Indicates
that device is ready for data.
NDAC
I/O
Data Accepted. IEEE 488 handshake line. Indicates
completion of message reception.
End or Identify. IEEE 488 control line. Indicates
EOI I/O the end of multiple byte transfer sequence or
signals a parallel poll in conjunction with ATN.
VCC I/O +5V DC.
IOT7210P
T/R1
T/R2
CLK
RESET
T/R3
DRQ
DACK
CS
RD
WR
INT
D
0
D1
D
2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 Vcc
39 EOI
38 NDAC
37 NRFD
36 DAV
35 DIO8
34 DIO7
33 DIO6
32 DIO5
31 DIO4
30 DIO3
29 DIO2
28 DIO1
27 SRQ
26 ATN
25 REN
24 IFC
23 RS 2
22 RS 1
21 RS
0
IOT7210T
GND
DAV
NRFD
NDAC
EOI
Vcc
T/R1
T/R2
CLK
RESET
T/R3
33 32 31 30 29 28 27 26 25 24 23
34 22
35 21
36 20
37 19
38 18
39 17
40 16
41 15
42 14
43 13
44 12
1 2 3 4 5 6 7 8 9 10 11
REN
IFC
RS2
RS1
RS0
GND
D7
D6
D5
D4
Vcc
2



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Functional Block Diagram
D7-D0
CS
www.DataSheet4U.com RS2-RS0
RD
WR
DRQ
DACK
Read/Write
Control
INT
Clock
Reset
Registers
Data In
Command
Pass Through
Byte Out
Address
Status
Address
Mode
Address 0/1
End-of-String
Interrupt
Mask 1/2
Interrupt
Status 1/2
Serial Poll
Parallel Poll
Aux A/B/E
Internal
Counter
DIO8-DIO1
Message
Decoder
Interface
Functions
SH1
AH1
T5/TE5
L3/LE3
SR1
RL1
PP1/PP2
DC1
DT1
C1
C2
C3
C4
Auxillary
Command
Decoder
C5
IEEE 488
Control
T/R 3-T/R1
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Electrical Characteristics
AbsoluteMaximum
Ratings
Exposing the device to stresses above those
listed here could cause permanent dam-
age to the IOT7210. The device is not
meant to be operated under conditions
outside the limits described in this speci-
fication. Exposure to absolute maximum
www.DatarSahteinetg4Uc.oconmditions for extended periods
may affect device reliability.
TA = 25C
Supply Voltage, Vcc
Input Voltage, VI
Output Voltage, Vo
Operating
Temperature, TOPR
Storage
Temperature, TSTG
-0.3V to +7.0V
-0.3V to Vcc +0.3V
-0.3V to Vcc +0.3V
0C to +70C
-55C to 125C
Capacitance
TA = 25C; VCC = GND = 0V
Symbol Min Max Unit Test Conditions
CIN
COUT
CI/O
15 pF
15 pF
15 pF
F = 1 MHz
All pins except pin
under test tied to
AC ground
AC/DC Characteristics
Parameter
EOI DIO
EOI T/R1
EOI T/R1
ATN NDAC
ATN
ATN
DAV
T/R1
T/R2
DRQ
DAV NRFD
DAV NDAC
DAV NDAC
DAV NRFD
RD NRFD
AC Characteristics
TA = 0C to 70C; Vcc = 5V ± 10%
Symbol Min Max Unit
tEODI
tEOTI1
tEOTI2
tATN0
tATT1
tATT2
tDVRQ
tDVNR1
tDVND1
tDVND2
tDVNR2
tRNR
35 ns
20 ns
25 ns
35 ns
30 ns
30 ns
25 ns
30 ns
40 ns
45 ns
35 ns
30 ns
NDAC DRQ
NDAC DAV
WR DIO
tNDRQ
tNDDV
tWDI
25 ns
25 ns
30 ns
NRFD DAV
tNRDV
30 ns
WR DAV
tWDV
550
+tSYNC
ns
TRIG Pulse Width
Address Setup to RD
Address Hold from RD
RD Pulse Width
Data Delay from Address
Data Delay from RD
Output Float Delay from RD
RD Recovery Time
Address Setup to WR
Address Hold from WR
WR Pulse Width
Data Setup to WR
Data Hold from WR
WR Recovery Time
DRQ Delay from DACK
Data Delay from DACK
DACK hold time from WR
tTRIG
tAR
tRA
tRR
tAD
tRD
tDF
tRV
tAW
tWA
tWW
tDW
tWD
tRV
tAKRQ
tAKD
tDH
50
0
0
0
55
0
50
0
0
55
10
0
50
5
ns
ns
ns
ns
ns
35 ns
35 ns
10 ns
ns
ns
ns
ns
ns
ns
ns
25 ns
35 ns
ns
DC Characteristics
TA = 0C to 70C; Vcc = 5V ± 10%
Input Low Voltage (except RESET) VIL
-0.3 +.08
V
Input High Voltage (except RESET) VIH
+2.0 VCC +0.3 V
Input Low Voltage (RESET)
-0.3 0.7
V
Input High Voltage (RESET)
Low-Level Output Voltage
High-Level Output Voltage
(except INT)
High-Level Output
Voltage (INT)
+2.1 VCC +0.3 V
VOL +0.4
VOH1
VOH2
+2.4
+2.4
+3.5
V
V
V
V
Input Leakage Current
Output Leakage Current
Supply Current
IIL -1 +1 µA
IOL -10 +10 µA
ICC 2 mA
Test Conditions
PPSS PPAS, ATN = True
PPSS PPAS, ATN = True
PPAS PPSS, ATN = False
AIDS ANRS, LIDS
TACS + SPAS TADS, CIDS
TACS + SPAS TADS, CIDS
ACRS ACDS, LACS
ACRS ACDS
ACRS ACDS AWNS
AWNS ANRS
AWNS ANRS ACRS
ANRS ACRS
LACS, DI register selected
STRS SWNS SGNS, TACS
STRS SWNS SGNS
SGNS SDYS
BO register selected
SDYS STRS, T1 = True
SGNS SDYS STRS
BO register selected;
RFD = True; N + fc = 8MHz;
T1 (high speed)
RS0 to RS2
CS
IOH = 1mA
IOH = 1mA
IOH = 50 µA
VIN = 0V to VCC
VOUT = 0 to VCC
Outputs Open
4



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