IA88C00 Datasheet PDF - InnovASIC

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IA88C00
InnovASIC

Part Number IA88C00
Description Microcontroller
Page 30 Pages


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IA88C00
Microcontroller
Data Sheet
Innovasic Semiconductor®
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Copyright © 2005



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IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Data Sheet Contents
Please Note.....................................................................................................................................................4
Features ..........................................................................................................................................................4
General Description .......................................................................................................................................4
Architecture..................................................................................................................................................13
Pin Descriptions ...........................................................................................................................................13
Registers .......................................................................................................................................................14
Working Register Window ......................................................................................................................15
Register List .............................................................................................................................................17
Mode and Control Registers ........................................................................................................................20
Instruction Summary....................................................................................................................................45
Opcode Map .................................................................................................................................................52
Instructions ...................................................................................................................................................53
Interrupts ......................................................................................................................................................56
Interrupt Programming Model .................................................................................................................58
Functional Overview................................................................................................................................58
Stack Operation............................................................................................................................................58
Counter/Timers ............................................................................................................................................59
WDT.............................................................................................................................................................59
Stop Mode ....................................................................................................................................................59
Halt Mode ....................................................................................................................................................60
I/O Ports .......................................................................................................................................................61
Port 0 ........................................................................................................................................................61
Port 1 ........................................................................................................................................................61
Port 2 and 3 ..............................................................................................................................................62
Port 4 ........................................................................................................................................................62
UART ...........................................................................................................................................................62
Pins ...........................................................................................................................................................63
Transmitter ...............................................................................................................................................63
Receiver....................................................................................................................................................63
Address Space ..........................................................................................................................................64
CPU Program Memory ............................................................................................................................64
CPU Data Memory...................................................................................................................................64
Absolute Maximum Ratings ........................................................................................................................66
Standard Test Conditions .............................................................................................................................66
Figure 63. Standard Test Load .............................................................................................................................66
DC Characteristics .......................................................................................................................................67
Input Handshake.......................................................................................................................................73
Output Handshake....................................................................................................................................74
EPROM Read Cycle ................................................................................................................................75
Copyright © 2005
Innovasic.com
Innovasic Semiconductor
ENG 21 0 050519-00
www.Innovasic
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IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Wait Timing .................................................................................................................................................75
De-Multiplexed Bus Timing .......................................................................................................................76
Package Information ....................................................................................................................................77
Ordering Information ...................................................................................................................................80
Copyright © 2005
Innovasic.com
Innovasic Semiconductor
ENG 21 0 050519-00
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1.888.824.4184



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IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Please Note
Included under Ordering Information on page 68 are enhanced RoHS-compliant versions of the IA88C00.
However, standard packaged or non RoHS-compliant versions of the IA88C00 microcontroller are still
available.
Features
Fully Form, Fit and Function Compatible with the Super8 (Z88C00)
Available in 48-, and 68-pin packages
Fully Compatible with the Super8 Instruction Set
Rich Program Register Set
128 Kbytes external program address space
Built-in Direct Memory Access (DMA)
Two Programmable 16-bit counter/timers with 8-bit prescalers
Up to 32 General Purpose I/O Lines including special handshake funtionality
Robust Interrupt structure
Watch-Dog Timer
General Description
The IA88COO is a form, fit and function replacement for the original Zilog® Z88C00 microcontroller.
Innovasic Semiconductor produces replacement ICs using its MILESTM, or Managed IC Lifetime
Extension System, cloning technology. This technology produces replacement ICs far more complex than
"emulation" while ensuring they are compatible with the original IC. MILESTM captures the design of a
clone so it can be produced even as silicon technology advances. MILESTM also verifies the clone against
the original IC so that even the "undocumented features" are duplicated.
This Data Sheet documents all necessary engineering information about the IA88COO including
functional and I/O descriptions, electrical characteristics, and applicable timing.
The function block diagram of the IA88C00 is shown in Figure 1. The device is available in a 48-pin DIP
(Figure 2) and a 68-pin PLCC package (Figure 3). The pin functions of the IA88COO are outlined in
Figure 6. Pin Functions.
Copyright © 2005
Innovasic.com
Innovasic Semiconductor
ENG 21 0 050519-00
Page 4 of 80
www.Innovasic
1.888.824.4184



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