IA82510 Datasheet PDF - InnovASIC

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IA82510
InnovASIC

Part Number IA82510
Description ASYNCHRONOUS SERIAL CONTROLLER
Page 14 Pages


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IA82510
ASYNCHRONOUS SERIAL CONTROLLER
Data Sheet
As of Production Ver. 01
FEATURES
Form, Fit, and Function Compatible with the Intel® 82510
Packaging options available: 28 Pin Plastic or Ceramic DIP, 28 Pin Plastic
Leaded Chip Carrier, 28 Pin Ceramic Leadless Chip Carrier
Asynchronous Serial Channel Operation
Separate Transmit and Receive FIFOs with Programmable Threshold
Programmable Baud Rate Generators up to 288K Baud
Special Protocol Features
- Control Character Recognition
- Auto Echo and Loopback Modes
- 9-Bit Protocol Support
- 5 to 9 Bit Character Format
The IA82510 is a "plug-and-play" drop-in replacement for the original IC. innovASIC produces replacement ICs
using its MILESTM, or Managed IC Lifetime Extension System, cloning technology. This technology produces
replacement ICs far more complex than "emulation" while ensuring they are compatible with the original IC.
MILESTM captures the design of a clone so it can be produced even as silicon technology advances. MILESTM
also verifies the clone against the original IC so that even the "undocumented features" are duplicated. This data
sheet documents all necessary engineering information about the IA82510 including functional and I/O
descriptions, electrical characteristics, and applicable timing.
Package Pinout
D4
D5
D6
D7
INT
TXD
VSS
X2 or OUT2n
X1 or CLK
SCLK or RIn
DSRn or TA or OUT0n
DCDn or ICLK or OUT1n
RXD
CTSn
IA82510
(1) (28)
(2) 28 Pin DIP (27)
(3) (26)
(4) (25)
(5) (24)
(6) (23)
(7) (22)
(8) (21)
(9) (20)
(10) (19)
(11) (18)
(12) (17)
(13) (16)
(14) (15)
D3
D2
D1
D0
A2
A1
A0
VDD
RDn
WRn
CSn
INT
TXD
VSS
X2 or OUT2n
X1 or CLK
SCLK or RIn
DSRn or TA or OUT0n
RESET
RTSn
DTRn or TB
D7 D6 D5 D4 D3 D2 D1
(4) (3) (2) (1) (28) (27) (26)
(5)
(6)
(7) IA82510
(8)
28 Pin LCC
(9)
(10)
(11)
(25)
(24)
(23)
(22)
(21)
(20)
(19)
(12) (13) (14) (15) (16) (17) (18)
D0
A2
A1
A0
VDD
RDn
WRn
Copyright © 2001
innovASIC
The End of Obsolescence
ENG211001219-01
Page 1 of 14
www.innovasic.com
Customer Support:
1-888-824-4184



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IA82510
ASYNCHRONOUS SERIAL CONTROLLER
Data Sheet
As of Production Ver. 01
DESCRIPTION
The IA82510 is an asynchronous serial controller that provides a CPU interface to one transmit
and one receive channel. It is Form, Fit, and Function compatible with the Intel 82510.
Configuration registers are used to control the serial channel, interrupts, and modes of operation.
The CPU controls this device via address and data lines with read/write control. The CPU also
uses this interface to read and write data to receive and transmit data through the serial channel.
FIFOs and various serial modes can be used to help off-load the CPU from transmitting and
receiving data. An interrupt line provides an indication to the CPU that the device requires
servicing. The device can be configured for 8250A/16450 compatibility.
Functional Block Diagram
A(2:0)
D(7:0)
RDn
WRn
CSn
INT
RESET
BUS INTERFACE
(Reset Logic,
Registers,
Interrupt Generation,
TIMING
(Baud Rate
Generators A & B,
Clocking
IA82510
TRANSMITTER
RECEIVER
CONFIG., STATUS, RXDATA
TXDATA
MODEM
TXD
PIN
CONFIGURATION
RXD
CTSn
RTSn
DSRn or TA or OUT0n
DCDn or ICLK or OUT1n
DTRn or TB
X1 or CLK
X2 or OUT2n
SCLK or RIn
Copyright © 2001
innovASIC
The End of Obsolescence
ENG211001219-01
Page 2 of 14
www.innovasic.com
Customer Support:
1-888-824-4184



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IA82510
ASYNCHRONOUS SERIAL CONTROLLER
Data Sheet
As of Production Ver. 01
Functional Overview
Transmitter
The Transmit function consists of a 4 × 11 bit FIFO, and a Transmit Engine. The 4 × 11 FIFO is
configurable as any depth between one and four words inclusive. The transmit engine is
responsible for reading the data out of the FIFO and placing it in the proper order on the TXD pin.
The transmit engine is highly configurable to be compatible with numerous formats, including
16450 and 8250 modes of communication. Transmit Communication parameters that can be
programmed include:
Parity modes
Stop Bits
Character Length
FIFO Depth
Clocking Options
RTS and CTS modes
See the Register Description for more details.
Receiver
The Receiver function consists of a 4 × 11 configurable FIFO and a Receive Engine. The receive
engine is responsible for sampling the data on the RXD input pin, formatting the data, and placing
the data in the FIFO. The receive engine is highly configurable with parameters that include:
Parity modes
Stop Bits
Character Length
FIFO Depth
Clocking Options
Address Matching Options
Control Character Detection
RTS and CTS modes
See the Register Description for more details.
Bus Interface
The Bus Interface is a simple interface that allows a micro-processor or micro-controller to read
and write the IA82510 Registers. It consists of the following I/O lines:
A0, A1, A2 : 3 Bit Address
D0-D7 :
8 Bit Data
RDn:
Active Low Read Enable
WRn:
Active Low Write Enable
CSn:
Active Low Chip Select
INT:
Interrupt Output
RESET:
Chip Reset
Copyright © 2001
innovASIC
The End of Obsolescence
ENG211001219-01
Page 3 of 14
www.innovasic.com
Customer Support:
1-888-824-4184



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IA82510
ASYNCHRONOUS SERIAL CONTROLLER
Register Description
Register
ACR0
ACR1
BACF
BAH
BAL
BANK
BBCF
BBH
BBL
CLCF
FLR
FMD
GER
GIR_BANK
GSR
ICM
IMD
LCR
LSR
MCR
MIE
MSR
PMD
RCM
RIE
RMD
RST
RXDATA
RXF
TCM
TMCR
TMD
TMIE
TMST
TXDATA
TXF
Table 1 – IA82510 Register Summary
ADDR
Bank
DLAB
Mode
111 00
X
R/W
101 10
X
R/W
001 11
0
R/W
001 00 1
R/W
000 00
1
R/W
010 X X W
011 11
X
R/W
001 11
1
R/W
000 11
1
R/W
000 11
0
R/W
100 01
X
R
001 10
X
R/W
001 00
0
R/W
010 X
X
R
111 01
X
R
111 01
X
W
100 10
X
R/W
011 00
X
R/W
101 00
X
R/W
100 00
X
R/W
100 01
X
W
101 11
X
R/W
110 00
X
R/W
110 01
X
R
100 11
X
R/W
101 01
X
W
110 10
X
R/W
111 10
X
R/W
101 01
X
R
000 00
0
R
01 X
001 01
X
R
110 01
X
W
011 01
X
W
011 10
X
R/W
110 11
X
R/W
011 01
X
R
000 00
0
W
01 X
001 01
X
W
Data Sheet
As of Production Ver. 01
Default
00000000
00000000
00000100
00000000
00000010
00000000
10000100
00000000
00000101
00000000
00000000
00000000
00000000
00000001
00010010
N/A
00001100
00000000
01100000
00000000
00001111
00000000
11111100
N/A
00011110
00000000
00000000
Unknown
Unknown
N/A
N/A
00000000
00000000
00110000
N/A
N/A
Copyright © 2001
innovASIC
The End of Obsolescence
ENG211001219-01
Page 4 of 14
www.innovasic.com
Customer Support:
1-888-824-4184



IA82510 datasheet pdf
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IA82510 pdf
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