IA80C152 Datasheet PDF - InnovASIC


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IA80C152
InnovASIC

Part Number IA80C152
Description UNIVERSAL COMMUNICATIONS CONTROLLER
Page 30 Pages

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IA80C152
Universal Communications Controller
Data Sheet
January 9, 2015
®
IA80C152
Universal Communications Controller
Data Sheet
®
IA211040524-07
http://www.Innovasic.com
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IA80C152
Universal Communications Controller
Data Sheet
January 9, 2015
Copyright 2015 by Innovasic Semiconductor, Inc.
Published by Innovasic Semiconductor, Inc.
3737 Princeton Drive NE, Suite 130, Albuquerque, NM 87107
Intel® is a registered trademark of Intel Corporation.
MILES™ is a trademark of Innovasic Semiconductor, Inc.
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IA80C152
Universal Communications Controller
Data Sheet
January 9, 2015
TABLE OF CONTENTS
List of Figures ..................................................................................................................................5
List of Tables ...................................................................................................................................6
1. Introduction.............................................................................................................................7
1.1 General Description.......................................................................................................7
1.2 Features .........................................................................................................................8
2. Packaging, Pin Descriptions, and Physical Dimensions.........................................................9
2.1 Packages and Pinouts ....................................................................................................9
2.1.1 JA/JC...............................................................................................................10
2.1.2 JB/JD...............................................................................................................13
2.1.3 Physical Dimensions.......................................................................................16
2.2 I/O Signal Description.................................................................................................17
3. Maximum Ratings, Thermal Characteristics, and DC Parameters .......................................20
4. Device Architecture ..............................................................................................................22
4.1 Functional Block Diagram ..........................................................................................22
4.2 Memory Space.............................................................................................................23
5. Peripheral Architecture .........................................................................................................25
5.1 Registers and Interrupts...............................................................................................25
5.2 Register Set Descriptions ............................................................................................27
5.2.1 A* (0E0h) .......................................................................................................27
5.2.2 ADR0,1,2,3 (095h, 0A5h, 0B5h, 0c5h) ..........................................................27
5.2.3 AMSK0,1 (0D5h, 0E5h).................................................................................28
5.2.4 B* (0F0h)........................................................................................................28
5.2.5 BAUD (094h) .................................................................................................28
5.2.6 BCRL0, BCRH0 (0E2h, 0E3h) ......................................................................28
5.2.7 BCRL1, BCRH1 (0F2h, 0F3h) .......................................................................28
5.2.8 BKOFF (0C4h) ...............................................................................................28
5.2.9 DARL0, DARH0 (0C2h, 0C3h) .....................................................................28
5.2.10 DARL1, DARH1 (0D2h, 0D3h).....................................................................29
5.2.11 DCON0,1 (092h, 093h) ..................................................................................29
5.2.12 DPL, DPH (082h, 083h) .................................................................................30
5.2.13 GMOD (084h) ................................................................................................30
5.2.14 IE* (0A8h) ......................................................................................................31
5.2.15 IEN1* (0C8h) .................................................................................................32
5.2.16 IFS (0A4h) ......................................................................................................32
5.2.17 IP* (0B8h) ......................................................................................................33
5.2.18 IPN1* (0F8h) ..................................................................................................33
5.2.19 MYSLOT (0F5h) ............................................................................................34
5.2.20 P0*, P1*, P2*, P3*, P4*, P5, P6 (080h, 090h, 0A0h, 0Boh, 0C0h,
091h, 0A1h) ....................................................................................................34
5.2.21 PCON (087h) ..................................................................................................35
5.2.22 PRBS (0E4h) ..................................................................................................36
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IA80C152
Universal Communications Controller
Data Sheet
January 9, 2015
5.2.23 PSW* (0D0h)..................................................................................................36
5.2.24 RFIFO (0F4h) .................................................................................................37
5.2.25 RSTAT* (0E8h)..............................................................................................37
5.2.26 SARL0, SARH0 (0A2h, 0A3h) ......................................................................38
5.2.27 SARL1, SARH1 (0B2h, 0B3h) ......................................................................38
5.2.28 SBUF (099h)...................................................................................................38
5.2.29 SCON* (098h) ................................................................................................38
5.2.30 SLOTTM (0B4h) ............................................................................................39
5.2.31 SP (081h) ........................................................................................................39
5.2.32 TCDCNT (0D4h)............................................................................................39
5.2.33 TCON* (088h)................................................................................................39
5.2.34 TFIFO (085h)..................................................................................................40
5.2.35 TH0, TL0 (08Ch, 08Ah).................................................................................40
5.2.36 TH1, TL1 (08Dh, 08Bh).................................................................................41
5.2.37 TMOD (089h).................................................................................................41
5.2.38 TSTAT* (0D8h) .............................................................................................41
5.3 Power Conservation Modes ........................................................................................42
5.4 Oscillator Pins .............................................................................................................43
6. Instruction Set Summary Table ............................................................................................50
7. AC Characteristics ................................................................................................................56
8. Innovasic/Intel Part Number Cross-Reference Table ...........................................................57
9. Errata.....................................................................................................................................58
9.1 Errata Summary...........................................................................................................58
9.2 Errata Detail ................................................................................................................58
10. Revision History ...................................................................................................................60
11. For Additional Information...................................................................................................61
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