IA21140AF Datasheet PDF - InnovASIC

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IA21140AF
InnovASIC

Part Number IA21140AF
Description PCI FAST ETHERNET LAN CONTROLLER
Page 19 Pages


IA21140AF datasheet pdf
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IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
innovASIC
Features
Form, Fit and Function Compatible with the DEC21140AF
Available in 144 Pin PQFP Package
Integrated Ethernet controller with PCI bus interface
Supports 10 Mb/s and 10/100 Mb/s network interface
PCS and scrambler/descrambler circuitry on chip
Supports multiple PCI features:
- Unlimited PCI burst
- PCI read multiple
- PCI write and invalidate
- PCI read line
- PCI 5.0V and 3.3V environments
Multiple interrupt sources
Contains two independent 3K FIFOs to minimize external memory additions
Provides sleep or snooze low-power modes
Interfaces with MicroWireSerial ROM
Provides a JTAG test port with boundary scan function
Complies with IEEE 802.3, ANSI 8802-3, and Ethernet standards
The IA21140AF is a "plug-and-play" drop-in replacement for the original IC. innovASIC produces
replacement ICs using its MILESTM, or Managed IC Lifetime Extension System, cloning technology. This
technology produces replacement ICs far more complex than "emulation" while ensuring they are compatible
with the original IC. MILESTM captures the design of a clone so it can be produced even as silicon
technology advances. MILESTM also verifies the clone against the original IC so that even the
"undocumented features" are duplicated. This data sheet documents all necessary engineering information
about the IA21140AF including functional and I/O descriptions, electrical characteristics, and applicable
timing.
Copyright © 2001
innovASIC
The End of Obsolescence
ENG210010110 -00
Page 1 of 19
www.innovasic.com
Customer Support:
1-888-824-4184



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IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
Package Pinout
int_n
rst_n
vdd
vss
pci_clk
vdd
gnt_n
req_n
vss
ad[31]
ad[30]
vss
ad[29]
ad[28]
vss
ad[27]
ad[26]
vdd
ad[25]
ad[24]
c_be_n[3]
idsel
vss
ad[23]
ad[22]
ad[21]
ad[20]
vdd
ad[19]
ad[18]
vdd
vss
vss
ad[17]
ad[16]
vss
1 1 1 11 1 1 1 1 1 1 11 1 1 1 1 1 1 1 11 1 1 1 1 1 1 11 1 1 1 1 1 1
4 4 4 44 3 3 3 3 3 3 33 3 3 2 2 2 2 2 22 2 2 2 1 1 1 11 1 1 1 1 1 0
1 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 108
2 107
3 106
4 105
5 104
6 103
7 102
8 101
9 100
10 99
11 98
12 97
13 96
14 95
15 94
16 93
17 92
18
19
IA21140AF
91
90
20 89
21 88
22 87
23 86
24 85
25 84
26 83
27 82
28 81
29 80
30 79
31 78
32 77
33 76
34 75
35 74
36 73
3 3 3 44 4 4 4 4 4 4 44 5 5 5 5 5 5 5 55 5 6 6 6 6 6 66 6 6 6 7 7 7
7 8 9 01 2 3 4 5 6 7 89 0 1 2 3 4 5 6 78 9 0 1 2 3 4 56 7 8 9 0 1 2
vss
vdd
mii_mdc
mii_mdio
nc
br_a[1]
br_a[0]
br_ce_n
br_ad[7]
br_ad[6]
vdd
vss
br_ad[5]
br_ad[4]
br_ad[3]
br_ad[2]
br_ad[1]
br_ad[0]
vss
gep[7]
gep[6]
gep[5]
gep[4]
vdd
vss
gep[3]
gep[2]
gep[1]
gep[0]
sr_cs
sr_ck
sr_di
sr_do
vdd
vss
vdd_clamp
Copyright © 2001
innovASIC
The End of Obsolescence
ENG210010110 -00
Page 2 of 19
www.innovasic.com
Customer Support:
1-888-824-4184



No Preview Available !

IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
Description
The innovASIC IA21140AF Fast Ethernet LAN controller provides a direct interface connection to
the PCI (Peripheral Component Interface) bus. It interfaces with the PCI bus by using on-chip
control and status registers (CSR’s), and a shared CPU memory area. The memory is initialized once
during setup to minimize CPU overhead during normal operation. Large receive and transmit
FIFO’s are contained on-chip so no additional on board memory is required. The IA21140AF
includes two on chip direct memory access (DMA) controllers with programmable burst size
providing for low CPU utilization. A PCI clock frequency from dc to 33 MHz (20-33 MHz for
operational network interface) is supported. Two network ports are supported. A serial standard 7-
wire 10-Mbps port (SRL) and a media independent interface/symbol 10/100-Mbps port
(MII/SYM). The 10 Mbps implements a direct interface to the external 10 Mbps front-end decoder
(ENDEC). The 10/100 Mbps port supports two modes. The first is a 100BASE-X physical coding
sublayer (PCS). The second is a full implementation of the MII standard. The IA21140AF functions
in a full-duplex environment for either network port.
Copyright © 2001
innovASIC
The End of Obsolescence
ENG210010110 -00
Page 3 of 19
www.innovasic.com
Customer Support:
1-888-824-4184



No Preview Available !

IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
System Block Diagram
This block below illustrates the major functions of the IA21140AF.
Boot ROM/
Board
External
Serial
Control
PCI
Register
ROM
Signals
DMA
PCI
Interface
32
32
Rx
FIFO
16
Boot
ROM
Port
32
Serial
ROM
Port
32
32
Tx
FIFO
16
RxM
TxM
4
11
4
Physical
Coding
Sublayer
4
Scrambler/
Descrambler
General-
Purpose
Register
8
4
Serial
Interface
MII/SYM
Interface
10 Mb/s
10 Mb/s or 100 Mb/s
Copyright © 2001
innovASIC
The End of Obsolescence
ENG210010110 -00
Page 4 of 19
www.innovasic.com
Customer Support:
1-888-824-4184



IA21140AF datasheet pdf
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IA21140AF pdf
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Related : Start with IA21140A Part Numbers by
IA21140AF PCI FAST ETHERNET LAN CONTROLLER IA21140AF
InnovASIC
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