HSDL-3220 Datasheet PDF - Agilent

www.Datasheet-PDF.com

HSDL-3220
Agilent

Part Number HSDL-3220
Description Data Compliant Low Power 4.0 Mbit/s Infrared Transceiver
Page 19 Pages


HSDL-3220 datasheet pdf
Download PDF
HSDL-3220 pdf
View PDF for Mobile

No Preview Available !

Agilent HSDL-3220 IrDA®
Data Compliant Low Power
4.0 Mbit/s Infrared Transceiver
www.DataSheet4U.com
Data Sheet
Description
The HSDL-3220 is a new
generation low profile high speed
infrared transceiver module that
provides interface between logic
and IR signals for through-air,
serial, half-duplex IR data-link.
The module is fully compliant to
IrDA Physical Layer specification
version 1.4 low power from
9.6kbit/s to 4.0 Mbit/s (FIR) and
is IEC825-Class 1 Eye Safe.
The HSDL-3220 can be shutdown
completely to achieve very low
power consumption. In the
shutdown mode, the PIN diode
will be inactive and thus produc-
ing very little photocurrent even
under very bright ambient light.
It is also designed to interface to
input/output logic circuits as low
as 1.8V. These features are ideal
for mobile devices that require
low power consumption.
VCC CX2
CX4
IOVCC (7)
SD (5)
VCC (6)
CX1
HSDL-3220
GND (8)
RXD (4)
TXD (3)
LED C (2)
Vled R1 LED A (1)
CX3
TRANSMITTER
Figure 1. Functional block diagram of HSDL-3220.
Features
• Fully compliant to IrDA 1.4 physical
layer low power specification from
9.6 kbit/s to 4.0 Mbit/s (FIR)
• Miniature package
– Height: 2.5 mm
– Width: 8.0 mm
– Depth: 3.0 mm
• Typical link distance > 50 cm
• Guaranteed temperature performance,
-25o to 70oC
• Critical parameters are guaranteed over
temperature and supply voltage
• Low power consumption
– Low shutdown current
– Complete shutdown of TXD, RXD,
and PIN diode
• Excellent EMI performance
• Vcc supply 2.7 to 3.6 Volts
• Interfacing with I/O logic circuits as
low as 1.8 V
• Lead-free package
• LED stuck-high protection
• Designed to accommodate light loss
with cosmetic windows
• IEC 825-class 1 eye safe
• Lead-free and RoHS Compliant
Applications
• Mobile telecom
– Mobile phones
– Smart phones
– Pagers
• Data communication
– Pocket PC handheld products
– Personal digital assistants
– Portable printers
• Digital imaging
– Digital cameras
– Photo-imaging printers
• Electronic wallet
• Small industrial & medical
instrumentation
– General data collection devices
– Patient & pharmaceutical data
collection devices
876 54321
Figure 2. Rear view diagram with pinout.



No Preview Available !

Application Support Information
The Application Engineering
Group is available to assist you
with the application design
Order Information
Part Number
Packaging Type
HSDL-3220-021
HSDL-3220-001
Tape and Reel
Tape and Reel
associated with the HSDL-3220
infrared transceiver module. You
can contact them through your
local sales representatives for
additional details.
Package
Front View
Front View
Quantity
2500
500
Marking Information
The unit is marked with the
letter “Gand YWWLLon the
shield where:
Y is the last digit of the year
WW is the work week
LL is the lot information
I/O Pins Configuration Table
Pin Symbol Description
1 LED A LED Anode
2 LED C LED Cathode
3 TXD
Transmit Data. Active High.
4 RXD
Receive Data. Active Low.
5 SD
Shutdown. Active High.
6 Vcc
Supply Voltage
7 IOVcc Input/Output ASIC Vcc
8 GND
Ground
- Shield EMI Shield
I/O Type
I
I
O
I
Notes
1
2
3
4
5
6
7
8
9
Recommended Application Circuit Components
Component
Recommended Value
Notes
R1 5.6Ω ± 5%, 0.25 watt for 2.7 Vled < 3.3V
10Ω ± 5%, 0.25 watt for 3.3 Vled < 4.2V
15Ω ± 5%, 0.25 watt for 4.2 Vled < 5.5V
CX1, CX4
0.47 µF ± 20%, X7R Ceramic
10
CX2, CX3
6.8 µF ± 20%, Tantalum
11
Notes:
1. Tied through external series resistor, R1, to regulated Vled from 2.7 to 5.5V. Please refer to table
above for recommended series resistor value.
2. Internally connected to LED driver. Leave this pin unconnected.
3. This pin is used to transmit serial data when SD pin is low. If this pin is held high for longer than
50 µs, the LED is turned off. Do NOT float this pin.
4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down
resistor is required. The pin is in tri-state when the transceiver is in shutdown mode. The receiver
output echoes transmitted signal.
5. The transceiver is in shutdown mode if this pin is high for more than 400 µs. On falling edge of
this signal, the state of the TXD pin sampled and used to set receiver low bandwidth (TXD=low)
or high bandwidth (TXD=high) mode. Refer to the section Bandwidth selection timingfor
programming information. Do NOT float this pin.
6. Regulated, 2.7 to 3.6 Volts.
7. Connect to ASIC logic controller Vcc voltage or supply voltage. The voltage at this pin must be
equal to or less than supply voltage.
8. Connect to system ground.
9. Connect to system ground via a low inductance trace. For best performance, do not connect
directly to the transceiver pin GND.
10. CX1 must be placed within 0.7 cm of the HSDL-3220 to obtain optimum noise immunity.
11. In environments with noisy power supplies, including CX2, as shown in Figure 1, can enhance
supply ripple rejection performance.
2



No Preview Available !

Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
SD/MODE
50%
tS tH
VIH
VIL
TXD 50%
50%
Figure 3. Bandwidth selection timing at SIR/MIR mode.
SD/MODE
50%
tS tH
VIH
VIL
TXD 50%
50%
VIL
Figure 4. Bandwidth selection timing at FIR mode.
VIH
VIL
Setting the transceiver to SIR/MIR
Mode (9.6 kbit/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
HIGH
2. TXD input should remain at
logic LOW
3. After waiting for tS 25 ns, set
SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
4. Ensure that TXD input re-
mains low for tH 100 ns, the
receiver is now in SIR/MIR
mode
5. SD input pulse width for mode
selection should be > 50 ns.
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
HIGH
2. After SD/Mode input remains
HIGH at > 25 ns, set TXD input
to logic HIGH, wait tS 25 ns
(from 50% of TXD rising edge
till 50% of SD falling edge)
3. Then set SD/Mode to logic
LOW, the HIGH to LOW
negative edge transition will
determine the receiver band-
width
4. After waiting for tH 100 ns,
set the TXD input to logic LOW
5. SD input pulse width mode
selection should be > 50 ns.
Transceiver I/O Truth Table
Inputs
Outputs
TXD
Light Input to Receiver
SD
LED RXD
Note
High Dont Care
Low On Not Valid
Low High
Low
Off Low
12,13
Low Low
Low Off High
Dont Care
Dont Care
High Off High
Notes:
12. In-band IrDA signals and data rates 4.0 Mbit/s
13. RXD logic low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
3



No Preview Available !

CAUTIONS: The BiCMOS inherent to the design of this component increases the components
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions
be taken in handling and assembly of this component to prevent damage and/or degradation which may
be induced by ESD.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is 50°C/W.
Parameter
Symbol Min. Max.
Storage Temperature
Operating Temperature
LED Anode Voltage
Supply Voltage
Input Voltage: TXD, SD/Mode
Output Voltage: RXD
DC LED Transmit Current
Average Transmit Current
TS
TA
VLEDA
VCC
VI
VO
ILED (DC)
ILED (PK)
-40
-25
0
0
0
0
+100
+70
6.5
6.5
6.5
6.5
50
200
Units
°C
°C
V
V
V
V
mA
mA
Conditions
90 µs pulse width
25% duty cycle
Recommended Operating Conditions
Parameter
Symbol Min.
Typ. Max. Units
Conditions
Supply Voltage
Input/Output Voltage
VCC
IOVcc
2.7
1.8
3.6 V
Vcc V
Logic Input Voltage
for TXD, SD/Mode
Logic High
Logic Low
Logic High
Receiver Input Irradiance
Logic Low
LED (Logic High) Current
Pulse Amplitude
VIH
VIL
EIH, min
IOVcc 0.5
0
EIH, max
EIL
ILEDA
150
IOVcc
0.4
0.0081
V
V
mW/cm2
0.020 mW/cm2
500 mW/cm2
0.3 µW/cm2
mA
9.6kbit/s in-band signals
1.152 Mbit/s[14]
1.152 Mbit/s < in-band signals
4.0 Mbit/s[14]
9.6 kbit/s in-band signals
4.0 Mbit/s[14]
For in-band signals[14]
Receiver Data Rate
0.0096
4.0 Mbit/s
Note :
14. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
4



HSDL-3220 datasheet pdf
Download PDF
HSDL-3220 pdf
View PDF for Mobile


Related : Start with HSDL-322 Part Numbers by
HSDL-3220 Data Compliant Low Power 4.0 Mbit/s Infrared Transceiver HSDL-3220
Agilent
HSDL-3220 pdf

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Contact