HD74LV2GT125A Datasheet PDF - Renesas Technology

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HD74LV2GT125A
Renesas Technology

Part Number HD74LV2GT125A
Description Dual Bus Buffer
Page 9 Pages


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HD74LV2GT125A
Dual Bus Buffer with 3–state Output /
CMOS Logic Level Shifter
REJ03D0148–0200Z
(Previous ADE-205-676A (Z))
Rev.2.00
Oct.23.2003
Description
The HD74LV2GT125A has dual bus buffer with 3–state output in an 8 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down, OE should be connected to VCC through a pull-up resistor; the minimum value of the
resistor is determined by the current sinking capability of the driver. The input protection circuitry on this
device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator
from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
HD74LV2GT125AUSE SSOP-8 pin
Package Code
TTP-8DBV
Package
Abbreviation
US
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Rev.2.00, Oct.23.2003, page 1 of 1



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HD74LV2GT125A
Outline and Article Indication
• HD74LV2GT125A
Index band
Lot No.
SSOP-8
Function Table
Inputs
OE
L
L
H
H : High level
L : Low level
X : Immaterial
Z : High impedance
A
H
L
X
YMW
T25
Y : Year code
(the last digit of year)
M : Month code
W : Week code
Marking
Output Y
H
L
Z
Rev.2.00, Oct.23.2003, page 2 of 8



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HD74LV2GT125A
Pin Arrangement
OE1 1
A1 2
Y2 3
GND 4
8 VCC
7 OE2
6 Y1
5 A2
(Top view)
Absolute Maximum Ratings
Item
Symbol Ratings
Unit Test Conditions
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation
at Ta = 25°C (in still air) *3
VCC
VI
VO
IIK
IOK
IO
ICC or IGND
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
±50
±25
±50
PT 200
V
V
V Output : H or L
VCC : OFF or output : Z
mA VI < 0
mA VO < 0 or VO > VCC
mA VO = 0 to VCC
mA
mW
Storage temperature
Tstg –65 to 150
°C
Notes:
The absolute maximum ratings are values, which must not individually be exceeded, and
furthermore no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.2.00, Oct.23.2003, page 3 of 8



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HD74LV2GT125A
Recommended Operating Conditions
Item
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise / fall time
Symbol
VCC
VIN
VOUT
Topr
tr, tf
Ratings
Unit Test Conditions
3.0 to 5.5
V
0 to 5.5
V
0 to VCC
0 to 5.5
V
Output : Z
–40 to +85
°C
0 to 100 (VCC = 3.0 to 3.6 V) ns
0 to 20 (VCC = 4.5 to 5.5 V)
Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol VCC (V) * Min Typ Max Unit Test condition
Input voltage
VIH 3.0 to 3.6 1.5
V
4.5 to 5.5 2.0
VIL 3.0 to 3.6 — — 0.6
Hysteresis voltage VH
4.5 to 5.5 —
3.3 —
— 0.8
0.10 —
V VT+ – VT–
5.0 — 0.15 —
Output voltage VOH Min to Max VCC–0.1 — — V IOH = –50 µA
3.0 2.48 — —
IOH = –6 mA
4.5 3.8
VOL Min to Max —
0.1
IOH = –12 mA
IOL = 50 µA
3.0 — — 0.44
IOL = 6 mA
4.5 — — 0.55
IOL = 12 mA
Input current IIN 0 to 5.5 — — ±1 µA VIN = 5.5 V or GND
Off state output
IOZ
Min to Max —
±5
µA VO = 5.5 V or GND
current
Quiescent
ICC 5.5 — — 10 µA VIN = VCC or GND,
supply current
IO = 0
ICC
5.5
1.5 mA One input VIN = 3.4 V,
other input VCC or GND
Output leakage
current
IOFF
0
——5
µA VO = 5.5 V
Input capacitance CIN
5.0
3.0 —
pF VIN = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
Rev.2.00, Oct.23.2003, page 4 of 8



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