GS74108ATP Datasheet PDF - GSI Technology

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GS74108ATP
GSI Technology

Part Number GS74108ATP
Description 512K x 8 4Mb Asynchronous SRAM
Page 13 Pages


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GS74108ATP/J/X
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
512K x 8
4Mb Asynchronous SRAM
8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
Features
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 120/95/85 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 36-pin SOJ package
GJ: RoHS-compliant 400 mil, 36-pin SOJ package
TP: 400 mil, 44-pin TSOP-II package
GP: RoHS-compliant 400 mil, 44-pin TSOP-II package
X: 6 mm x 10 mm FPBGA package
GX: RoHS-compliant 6 mm x 10 mm FPBGA package
• RoHS-compliant packages available
Description
The GS74108A is a high speed CMOS Static RAM organized
as 524,288 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS74108A operates
on a single 3.3 V power supply and all inputs and outputs are
TTL-compatible. The GS74108A is available in 400 mil SOJ,
400 mil TSOP-II, and 6 mm x 10 mm FPBGA packages.
Pin Descriptions
Symbol
A0–A18
DQ1–DQ8
CE
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
SOJ 512K x 8-Pin Configuration
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
DQ1 7
DQ2 8
VDD 9
VSS 10
DQ3 11
DQ4 12
WE 13
A17 14
A16 15
A15 16
A14 17
A13 18
36-pin
400 mil SOJ
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A5
A6
A7
A8
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
A10
A11
A12
A18
NC
FP-BGA 512K x 8 Bump Configuration (Package X)
123456
A NC OE A2 A6 A7 NC
B DQ1 NC A1 A5 CE DQ8
C DQ2 NC A0 A4 NC DQ7
D VSS NC A18 A3 NC VDD
E VDD NC A17 A9 NC VSS
F DQ3 NC A13 A10 NC DQ6
G DQ4 NC A14 A11 WE DQ5
H NC A16 A15 A12 A8 NC
6 mm x 10 mm
*All GSI Technology packages are at least 5/6 RoHS compliant.
Packages listed with the additional “G” designator are 6/6 RoHS compliant.
Rev: 1.07 1/2006
1/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.



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TSOP-II 512K x 8-Pin Configuration
NC 1
44 NC
NC 2
43 NC
A4 3
A3 4
A2 5
A1 6
A0 7
CE 8
42 NC
41 A5
40 A6
39 A7
38 A8
37 OE
DQ1 9
36 DQ8
DQ2 10
35 DQ7
VDD 11 44-pin 34 VSS
VSS
12 400 mil TSOP II 33
VDD
DQ3 13
32 DQ6
DQ4 14
31 DQ5
WE 15
A17 16
A16 17
30 A9
29 A10
28 A11
A15 18
27 A12
A14 19
26 A18
A13 20
25 NC
NC 21
NC 22
24 NC
23 NC
Block Diagram
A0 Row
Decoder
Address
Input
Buffer
A18
CE
WE
OE
Control
Memory Array
Column
Decoder
I/O Buffer
DQ1 DQ8
GS74108ATP/J/X
Rev: 1.07 1/2006
2/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.



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GS74108ATP/J/X
Truth Table
CE
H
L
L
L
Note:
X: “H” or “L”
OE
X
L
X
H
WE
X
H
L
H
DQ1 to DQ8
Not Selected
Read
Write
High Z
VDD Current
ISB1, ISB2
IDD
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
Storage temperature
VDD
VIN
VOUT
PD
TSTG
–0.5 to +4.6
–0.5 to VDD +0.5
(4.6 V max.)
–0.5 to VDD +0.5
(4.6 V max.)
0.7
–55 to 150
V
V
V
W
oC
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Supply Voltage for -8/-10/-12
VDD
3.0
3.3
Input High Voltage
VIH 2.0 —
Input Low Voltage
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
VIL –0.3
TAc 0
TAI –40
Notes:
1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Max
3.6
VDD +0.3
0.8
70
85
Unit
V
V
V
oC
oC
Rev: 1.07 1/2006
3/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.



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Capacitance
Parameter
Symbol
Test Condition
Input Capacitance
Output Capacitance
CIN
COUT
VIN = 0 V
VOUT = 0 V
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Input Leakage
Current
IIL
Output Leakage
Current
ILO
Output High Voltage
Output Low Voltage
VOH
VOL
Test Conditions
VIN = 0 to VDD
Output High Z
VOUT = 0 to VDD
IOH = –4 mA
ILO = +4 mA
Max
5
7
Min
– 1 uA
–1 uA
2.4
GS74108ATP/J/X
Unit
pF
pF
Max
1 uA
1 uA
0.4 V
Power Supply Currents
Parameter Symbol
Test Conditions
Operating
Supply
Current
IDD
CE VIL
All other inputs
VIH or VIL
Min. cycle time
IOUT = 0 mA
Standby
Current
ISB1
CE VIH
All other inputs
VIH or VIL
Min. cycle time
Standby
Current
CE VDD - 0.2V
ISB2 All other inputs
VDD - 0.2V or 0.2V
0 to 70°C
8 ns 10 ns
120 mA
95 mA
30 mA
25 mA
10 mA
12 ns
85 mA
22 mA
–40 to 85°C
8 ns
10 ns
12 ns
130 mA 105 mA
95 mA
40 mA
35 mA
32 mA
20 mA
Rev: 1.07 1/2006
4/13
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.



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