FS8170 Datasheet PDF - Himark

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FS8170
Himark

Part Number FS8170
Description Low Power Phase-locked Loop IC
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FS8170 2.5 GHz Low Power Phase-locked Loop IC
HiMARK Technology, Inc. reserves the right to change the product described in this datasheet. All information con-
tained in this datasheet is subject to change without prior notice. HiMARK Technology, Inc. assumes no responsibility
for the use of any circuits shown in this datasheet.
Description
The FS8170 IC is a serial data input, fully programmable phase-locked loop with a 2.5
GHz prescaler for use in the local oscillator subsystem of radio transceivers. Multi-modu-
lus division ratios of 32/33 and 64/65 are selectable thru serial programming to enable
pulse swallowing operation. When combined with an external VCO, the FS8170 becomes
the core of a very low power frequency synthesizer well-suited for mobile communication
applications, such as 2.4 GHz ISM-band wireless data links and cellular GSM and PCS.
The FS8170 is also pin compatible with Fujitsu’s MB15E07SL IC.
Features
! Maximum input frequency: 2.5 GHz
! Supply voltage range from 2.4 V to 3.6 V
! Low current consumption in locked state:
! Digitally-filtered lock detect output
3.5 mA typ. (VCC = VP = 2.7 V, TA = +25 °C)
4.0 mA typ. (VCC = VP = 3.0 V, TA= +25 °C)
10 µA max. in asynchronous power-down mode
! 18-bit programmable input frequency divider using ÷ 32/33/64/65 multi-modulus prescaler with divide ratio range
from 992 to 65631 for ÷ 32/33 mode and from 4032 to 131135 for ÷ 64/65 mode
! 14-bit programmable reference frequency divider with divide ratio range from 3 to 16383
! Programmable charge pump current: 1.5 mA or 6 mA
! Pin compatible with Fujitsu MB15E07, MB15E07L, MB15E07SL
! 16 pin, plastic TSSOP (0.65 mm pitch)
Package and Pin Assignment
16 pin, plastic TSSOP (dimensions in mm)
XIN 1
XOUT 2
VP 3
VCC 4
DO 5
VSS 6
XFIN 7
FIN 8
16 φR
15 φP
14 FOLD
13 ZC
12 EN
11 LE
10 DATA
9 CLK
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Pin Descriptions
FS8170
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
Name
XIN
XOUT
VP
VCC
DO
VSS
XFIN
FIN
CLK
DATA
LE
EN
ZC
14 FOLD
15 φP
16 φR
I/O Description
I Reference crystal oscillator or external clock input with internally biased amplifier
O Reference crystal oscillator output
— Power supply voltage for the charge pump
— Power supply voltage
O Single-ended charge pump output
— Ground
I Complementary input for prescaler (normally ac-bypassed via a capacitor)
I VCO frequency input with internally biased input amplifier
I Shift register clock input
I Serial data input
I Load enable signal input
I Power-down control
I Forced high-impedance control for the charge pump
O
Multiplexed CMOS level output (see Functional Description section for programming infor-
mation)
O Phase comparator N-channel open drain output for an external charge pump
O Phase comparator CMOS inverter output for an external charge pump
Functional Block Diagram
FIN
XFIN
DATA
CLK
LE
EN
XIN
XOUT
N-PRESCALER
N-COUNTER
CONTROL
LOGIC
OSC
N-LATCH
SHIFT REGISTER
R-LATCH
R-COUNTER
PFD
LOCK
DETECTOR
CHARGE
PUMP
LD MUX
φR
φP
DO
ZC
FOLD
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Absolute Maximum Ratings
VSS = 0 V
Parameter
Supply voltage range
Input voltage range
Output voltage range
Storage temperature range
Soldering temperature range
Soldering time range
ESD rating (human body mode)
Symbol
VCC
VP
VFIN
VO
VDO
TSTG
TSLD
tSLD
Rating
Unit
VSS – 0.3 to VSS + 4.0
VCC to 6.0
VSS – 0.5 to VDD + 0.5
VSS to VCC
VSS to VP
–55 to 125
V
V
V
V
V
°C
260 °C
4
3500
s
eV
Recommended Operating Conditions
VSS = 0 V
Parameter
Supply voltage range
Operating temperature
Symbol
Value
min. typ. max.
Unit
VCC
2.4 3.0 3.6
V
VP
Vcc – 5.5
V
TA –40 25 80 °C
FS8170
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FS8170
Electrical Characteristics
(VCC = VP = 3.0 V, VSS = 0 V, TA = –40 to 85 °C unless otherwise noted)
Parameter
Symbol
Condition
Value
Unit
min. typ. max.
GENERAL
Power supply current consumption
ICC,total
fin = 2.5 GHz
4 mA
Standby current consumption
ICC,standby
ZC = “H” or open
10 µA
FIN operating frequency
fFIN
VFIN = 0.3 Vpk-pk sinusoid
50
2500 MHz
XIN operating frequency
fXIN
3 40 MHz
Input sensitivity
PFIN
50 measurement system
-15
+2 dBm
XIN input voltage swing
VXIN
0.5
VCC
Vpk-pk
CHARGE PUMP
RF charge pump output current
IDOsource
IDOsink
IDOsource
IDOsink
VDO = VP/2, CS bit = “H”
VDO = VP/2, CS bit = “H”
VDO = VP/2, CS bit = “L”
VDO = VP/2, CS bit = “L”
-6 mA
6 mA
-1.5 mA
1.5 mA
DIGITAL INTERFACE (DATA, CLK, LE, PS, ZC)
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
XIN logic HIGH input current
XIN logic LOW input current
VIH
VIL
IIH
IIL
IIH,XIN
IIL,XIN
0.8×VCC
VIH = VCC = 3.6V
VIL = 0 V, VCC = 3.6V
VIH = VDD
VIL = 0 V
–1
–1
–100
0.2×VCC
1
1
100
V
V
µA
µA
µA
µA
φP logic LOW output voltage
φP logic LOW output current
φR logic HIGH output voltage
VOL Open drain output
IOL Open drain output 1
VOH
VCC = VP = 3.0 V, IOH = –1 mA
VCC
0.4
0.4 V
mA
V
φR logic LOW output voltage
φR logic HIGH output current
φR logic LOW output current
VOL VCC = VP = 3.0 V, IOL = 1 mA
IOH VCC = VP = 3.0 V
IOL VCC = VP = 3.0 V 1
0.4 V
–1 mA
mA
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