ESD11B5.0ST5G Datasheet PDF - ON Semiconductor


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ESD11B5.0ST5G
ON Semiconductor

Part Number ESD11B5.0ST5G
Description Mid-Capacitance Bi-Directional TVS Diode
Page 4 Pages

ESD11B5.0ST5G datasheet pdf
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www.DatEaShSeetD4U.c1om1B5.0ST5G
Transient Voltage
Suppressors
MicroPackaged Diodes for ESD Protection
The ESD11B Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space comes at a premium.
Specification Features
Low Capacitance 12 pF
Low Clamping Voltage
Small Body Outline Dimensions: 0.60 mm x 0.30 mm
Low Body Height: 0.3 mm
Standoff Voltage: 5.0 V
Low Leakage
Response Time is < 1 ns
IEC6100042 Level 4 ESD Protection
IEC6100044 Level 4 EFT Protection
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Mechanical Characteristics
MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IEC 6100042 (ESD)
Contact
Air
±8.0 kV
±15
Total Power Dissipation on FR5 Board
(Note 1) @ TA = 25°C
Thermal Resistance, JunctiontoAmbient
Junction and Storage Temperature Range
Lead Solder Temperature Maximum
(10 Second Duration)
°PD°
RqJA
TJ, Tstg
TL
250 mW
400
40 to +125
260
°C/W
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR5 = 1.0 x 0.75 x 0.62 in.
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DSN2
CASE 152AA
MARKING
DIAGRAM
PIN 1
XXXX
YYY
XXXX = Specific Device Code
YYY = Year Code
ORDERING INFORMATION
Device
Package
Shipping
ESD11B5.0ST5G DSN2 5000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2009
July, 2009 Rev. 2
1
Publication Order Number:
ESD11B5.0S/D



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ESD11B5.0ST5G
www.DataESLhEeCetT4RU.IcCoAmL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
Parameter
IPP Maximum Reverse Peak Pulse Current
VC Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IR Maximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
IT Test Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
I
IPP
VC VBR VRWM IIRT IIRT VRWM VBR VC V
IPP
BiDirectional TVS
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
VRWM IR (mA) VBR (V) @ IT
(V) @ VRWM
(Note 2)
IT
C (pF)
VC
Device
Device
Marking
Max
Max
Per IEC6100042
Min mA Typ Max
(Note 4)
ESD11B5.0ST5G
11B5 5.0 1.0
5.8 1.0 12 13.5 Figures 1 and 2
See Below
2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
3. Surge current waveforms per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC6100042
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC6100042
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ESD11B5.0ST5G
www.DataISEhCee6t14U00.c0om42 Spec.
Level
Test
Voltage
(kV)
First Peak
Current
(A)
12
7.5
24
15
3 6 22.5
48
30
Current at
30 ns (A)
4
8
12
16
Current at
60 ns (A)
2
4
6
8
IEC6100042 Waveform
Ipeak
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 3. IEC6100042 Spec
tP = 0.7 ns to 1 ns
ESD Gun
TVS
Oscilloscope
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC6100042 waveform. Since the
IEC6100042 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
100
90 tr
80
70
60
50
40
30
20
10
0
0
PEAK VALUE IRSM @ 8 ms
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE IRSM/2 @ 20 ms
tP
20 40
60
t, TIME (ms)
Figure 5. 8 X 20 ms Pulse Waveform
80
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ESD11B5.0ST5G
PACKAGE DIMENSIONS
DSN2, 0.6x0.3, 0.4P, (0201)
CASE 152AA01
ISSUE O
DA
B
2X 0.06 C
E
2X 0.06 C
TOP VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
MILLIMETERS
DIM MIN MAX
A 0.24 0.30
A1 0.00 0.01
b 0.22 0.28
D 0.30 BSC
E 0.60 BSC
e 0.40 BSC
L 0.12 0.18
0.05 C
A
2X 0.05 C
A1
SIDE VIEW
C
SEATING
PLANE
1e
2X L
2 2X b
0.05 C A B
BOTTOM VIEW
MOUNTING FOOTPRINT*
0.28
CATHODE BAND MONTH CODING
DEC NOV OCT
SEP
XXXXJUN
YYYMAR
DEVICE CODE
YEAR CODE
FEB
JAN
XXXX
Y09
(EXAMPLE)
INDICATES AUG 2009
0.75
0.28 0.30
DIMENSIONS: MILLIMETERS
See Application Note AND8398/D for more mounting details
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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ESD11B5.0S/D




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