DM8812 Datasheet PDF - National Semiconductor

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DM8812
National Semiconductor

Part Number DM8812
Description TTL-MOS hex inverter
Page 3 Pages


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Level Translators/Buffers
DM7810/DM8810 quad 2-input TTL-MOS interface gate
DM78111DM8811 quad 2-input TTL-MOS interface gate
DM7812/DM8812 TTL-MOS hex inverter
general description
These Series 54/74 compatible gates are high out-
put voltage versions of the DM5401/DM7401
(SN 5401 /SN 740 1), DM5403/DM7403
(SN 5403/SN 7403), and DM5405/DM7405
(SN5405/SN7405). Their open-collector outputs
may be "pulled-up" to +14 volts in the logical "1"
state thus providing guaranteed mteFface between
TTL and MOS logic levels.
In addition the devices may be used In applications
where it IS deSIrable to drive low current relays or
lamps that require up to 14 volts.
schematic and connection diagrams
r------.------Ovoc
~--_.--------ov"
4K 16K
INPUTS 0-:,-+-......
OUTPUT
L - -.....-oGND
DM7810/DM8810, DM7811/DM8811
Dual·ln-Llne Package
INPUT
OUTPUT
,.
L-----_---o GND
DM7812/DM8812
Dual-I n-Line and Flat Package
cc
3:3:
-..J-..J
.C..O..C..O.
.c..........c.0....
3:3:
COCO
C..O...C.O..
.... 0
c
3:
-..J
.C.O..
.N.....
c
3:
CO
.C.O..
N
TOPVIEW
DM7810/DM8810
GND
Dual-In-Line and Flat Package
" "14 11 10
TOP VIEW
DM7811/DM8811
ORDER
NUMBER
DM7810J
DM7811J
DM7812J
DM881OJ
DM881 tJ
DM8812J
SEE
PKG
16
16
16
16
16
16
ORDER
NUMBER
DM7810N
DM7811N
DM7812N
DM8810N
DM8811N
DM8812N
SEE
PKG
24
22
22
22
22
22
ORDER
NUMBER
DM7811W
DM7812W
DM8811W
DM8812W
SEE
PKG
27
27
27
27
TOP VIEW
DM7812/DM8812
GND
2-13



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·0....
cCoO
:E
N....
CO
CO
:E
Q
Q
.......
0....
C..O..
:E
.......
.N...
C..O..
:E
Q
Q
........
CO
CO
:E
Q
...............
fJZ
:E
Q
absolute maximum ratings
operating conditions
Vee
Input Voltage
Output Voltage
Storage Temperature Range
Lead Temperature (Soldering, 10 second,)
7V
5.5V
14V
-65°e to +150oe
3000 e
Supply Voltage (Vee)
DM78XX
DM88XX
Temperature (TA)
DM78XX
DM88XX
MIN
4.75
4.75
-55
0
MAX
5.25
5.25
+125
+70
UNITS
V
V
°e
°e
electrical characteristics (Note 1)
PARAMETER
Input Diode Clamp Voltage
Logical "1" Input Voltage
Logical "0" Input Voltage
Logical "1" Output Current
Logical "1" Output Sreakdown
Voltage
Logical "0" Output Voltage
Logical "1" Input Current
Logical "1" Input Current
Logical "0" Input Current
Supply Current - Logical "0"
(Each Gate)
Supply Current - Logical "1"
(Each Gate)
Propagation Delay Tirne to a
Logical "0", tpdQ
Propagation Delay Time to a
Logical "1", tpdt
CONDITIONS
Vee = 5.0V, TA = 25°C
liN = -12 mA
Vee = Min
Vee = Min
Vee = Min V ,N = 0.8V
VOUT = 10V V ,N = O.OV
Vee = Min, V 1N = OV
lOUT = 1 mA
Vee = Min, V 1N = 2.0V
IOUT= 16 rnA
Vee = Max, VU'J = 2.4V
Vee = Max, V 1N = 5.5V
Vee = Max, V ,N = 0.4V
Vee = Max, V ,N = 5.0V
Vee = Max, V ,N = OV
Vee = 5.0V, TA = 25°C
COUT = 15 pF, RL = lk
Vee = 5.0V, TA = 25°C
COUT = 15 pF, RL = lk
MIN
TYP
MAX UNITS
-1.5 V
2.0 V
0.8 V
250 /-LA
40 /-LA
14 V
0.4 V
40 /-LA
1 rnA
-1.6 rnA
3.0 5.1 rnA
1.0 1.8 rnA
4 12
18 ns
18 29 45 ns
Note 1: Unless otherwise specified minImax limits apply across the _55°C to +12SoC temperature range for the DM78XX and
across the ooe to 700 e range for the DM88XX. All tYPical, are given for Vee = 5.0V and T A = 25°e.
typical applications
+10V
I.JK
GAOUND
yo--+--I'·PU'
OM1810, OMJ811, DMfJ812
Note. Normal voltages applied to MOS shltt
LCLOCK
1I
~
regIsters have been shifted by +10V for thiS +IDV---,
.pphcatlOn.
L-.-6V
NSC MOS shih register
(Example MM506)
2-14
UK
IYo--....--I1INPUT WI
I
OMlIIO, DMUl1, DMlln:
!.IL-_.,-vr'_.....
NSC MOS ROM
(Example MM521)
-1!V



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ac test circuit and switching time waveforms
+5V
(
R,
~ r0-
~<~
COUT
~I ,~1.5V--1
II
INPUT
I
I
'
"~'l\JrI
I
I
:
---50"~---
Ii
II
II
II ' I I
tpdo _ _1 i~1
II
I
I~tpdl
I
f=1 MHz
t, '" tf = to ns
PW= 180ns
-s0....:,s.0...:,
coco
~~ O
s0 :O........
--coS:
C_OCCOO
.0
-os:
~
i')
s:o........
-CO
CO
i')
2-15



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