DM74LS469 Datasheet PDF - Fairchild Semiconductor

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DM74LS469
Fairchild Semiconductor

Part Number DM74LS469
Description 8-Bit Up/Down Counter
Page 8 Pages


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April 1998
DM74LS469
8-Bit Up/Down Counter
General Description
The ’LS469 is an 8-bit synchronous up/down counter with
parallel load and hold capability. Three function-select inputs
(LD, UD, CBI) provide one of four operations which occur
synchronously on the rising edge of the clock (CK).
The LOAD operation loads the inputs (D7–D0) into the output
register (Q7–Q0). The HOLD operation holds the previous
value regardless of clock transitions. The INCREMENT op-
eration adds one to the output register when the carry-in in-
put is TRUE (CBI =LOW), otherwise the operation is a
HOLD. The carry-out (CBO) is TRUE (CBO =LOW) when
the output register (Q7–Q0) is all HIGHs, otherwise FALSE
(CBO =HIGH). The DECREMENT operation subtracts one
from the output register when the borrow-in input is TRUE
(CBI =LOW), otherwise the operation is a HOLD. The
borrow-out (CBO) is TRUE (CBO =LOW) when the output
register (Q7–Q0) is all LOWs, otherwise FALSE (CBO
=HIGH).
The output register (Q7–Q0) is enabled when OE is LOW,
and disabled (HI-Z) when OE is HIGH. The output drivers will
sink the 24 mA required for many bus-interface standards.
Two or more ’LS469 octal up/down counters may be cas-
caded to provide larger counters.
Features/Benefits
n 8-bit up/down counter for microprogram-counter, DMA
controller and general-purpose counting applications
n 8 bits matches byte boundaries
n Bus-structured pinout
n 24-pin SKINNYDIP saves space
n 3-STATE outputs drive bus lines
n Low current PNP inputs reduce loading
n Expandable in 8-bit increments
Connection Diagram
Top View
Standard Test Load
DS008333-3
DS008333-1
Order Number DM54LS469J,
DM74LS469J or DM74LS469N
See Package Number J24F or N24C
© 1998 Fairchild Semiconductor Corporation DS008333
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Function Table
OE CK LD UD CBI D7–D0 Q7–Q0
Operation
H XXX X
X
Z
HI-Z
L LXX
D
D
LOAD
L HLH
X
Q
HOLD
L H L L X Q plus 1 INCREMENT
L HHH
X
Q
HOLD
L HH L
X Q minus 1 DECREMENT
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Absolute Maximum Ratings (Note 1)
Supply Voltage VCC
Input Voltage
7V
5.5V
Off-State Output Voltage
Storage Temperature
5.5V
−65˚C to +150˚C
Operating Conditions
Symbol
Parameter
Military
Commercial
Units
Min Typ
Max
Min Typ Max
VCC Supply Voltage
4.5 5
5.5
4.75 5 5.25
V
TA Operating Free-Air Temperature
−55
125 (Note 2)
0
75 ˚C
tW Width of Clock
Low 40
35 10
ns
High
30
25
tSU Set Up Time
60 50 ns
th Hold Time
0 −15
0 −15
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits.
Note 2: Case Temperature
Electrical Characteristics
Over Operating Conditions
Symbol
Parameter
Test Conditions
Min Typ
(Note 4)
VIL
VIH
VIC
IIL
IIH
II
VOL
VOH
IOZL
IOZH
IOS
ICC
Low-Level Input Voltage
High-Level Input Voltage
Input Clamp Voltage
Low-Level Input Current
High-Level Input Current
Maximum Input Current
Low-Level Output Voltage
High-Level Output Voltage
Off-State Output Current
Output Short-Circuit Current
(Note 3)
Supply Current
VCC=MIN
VCC=MAX
VCC=MAX
VCC=MAX
VCC=MIN
VIL=0.8V
VIH=2V
VCC=MIN
VIL=0.8V
VIH=2V
VCC=MAX
VIL=0.8V
VIH=2V
VCC=5.0V
II=−18 mA
VI=0.4V
VI=2.4V
VI=5.5V
MIL
COM
MIL
COM
VCC=MAX
IOL=12 mA
IOL=24 mA
IOH=−2 mA
IOH=−3.2 mA
VO=0.4V
VO=2.4V
VO=0V
2
2.4
−30
120
Note 3: No more than one output should be shorted at a time and duration of the short-circuit should not exceed one second
Note 4: All typical values are VCC=5V, TA=25˚C.
Max
0.8
−1.5
−0.25
25
1
0.5
−100
100
−130
180
Units
V
V
V
mA
µA
mA
V
V
µA
µA
mA
mA
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Switching Characteristics
Over Operating Conditions
Symbol
Parameter
Test Conditions
(See Test Load/Waveforms)
fMAX
Maximum Clock
Frequency
tPD CBI to CBO Delay
tPD Clock to Q
tPD Clock to CBO
tPZX Output Enable Delay
tPXZ Output Disable Delay
CL=50 pF
R1=200
R2=390
Military
Min Typ
10.5
Max
Commercial
Min Typ Max
12.5
Units
MHz
35 60
20 35
55 95
20 45
20 45
35 50
20 30
55 80
20 35
20 35
ns
ns
ns
ns
ns
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