CYU01M16SFCU Datasheet PDF - Cypress Semiconductor

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CYU01M16SFCU
Cypress Semiconductor

Part Number CYU01M16SFCU
Description 16-Mbit (1M x 16) Pseudo Static RAM
Page 12 Pages


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PRELIMINARY
CYU01M16SFCU
MoBL3™
16-Mbit (1M x 16) Pseudo Static RAM
Features
• Wide voltage range: 1.7V–1.95V
• Access Time: 70 ns
• Ultra-low active power
— Typical active current: 3 mA @ f = 1 MHz
— Typical active current: 18mA @ f = fmax
• Ultra low standby power
• 16-word Page Mode
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Offered in a 48-ball BGA Package
• Operating Temperature: –40°C to +85°C
Functional Description[1]
The CYU01M16SFCU is a high-performance CMOS Pseudo
Static RAM organized as 1M words by 16 bits that supports an
asynchronous memory interface. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL®) in
Logic Block Diagram
DATA IN DRIVERS
portable applications such as cellular telephones. The device
can be put into standby mode when deselected (CE1 HIGH or
CE2 LOW or both BHE and BLE are HIGH). The input/output
pins (I/O0 through I/O15) are placed in a high-impedance state
when: deselected (CE1 HIGH or CE2 LOW), outputs are
disabled (OE HIGH), both Byte High Enable and Byte Low
Enable are disabled (BHE, BLE HIGH), or during a write
operation (CE1 LOW and CE2 HIGH and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW.
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0
through I/O7), is written into the location specified on the
address pins (A0 through A19). If Byte High Enable (BHE) is
LOW, then data from I/O pins (I/O8 through I/O15) is written into
the location specified on the address pins (A0 through A19).
Reading from the device is accomplished by taking Chip
Enables (CE1 LOW and CE2 HIGH) and Output Enable (OE)
LOW while forcing the Write Enable (WE) HIGH. If Byte Low
Enable (BLE) is LOW, then data from the memory location
specified by the address pins will appear on I/O0 to I/O7. If Byte
High Enable (BHE) is LOW, then data from memory will appear
on I/O8 to I/O15. Refer to the truth table for a complete
description of read and write modes.
AAAAAAAAAAA11111111141088326579
1M x 16
RAM Array
A19
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
BHE
WE
OE
BLE
Power -Down
Circuit
BHE
BLE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
CE2
CE1
CE2
CE1
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
www.DDaotacSuhmeeetn4Ut #.n:e3t 8-05603 Rev. *B
Revised January 25, 2006



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PRELIMINARY
CYU01M16SFCU
MoBL3™
Pin Configuration[2, 3]
48-Ball VFBGA
Top View
12
34
56
BLE OE A0 A1 A2 CE2
I/O8 BHE A3 A4 CE1 I/O0
I/O9 I/O10 A5 A6 I/O1 I/O2
VSS I/O11 A17 A7 I/O3 VCC
VCC I/O12 NC
A16 I/O4 VSS
I/O14 I/O13 A14 A15 I/O5 I/O6
I/O15 A19 A12 A13 WE I/O7
A18 A8 A9 A10 A11
NC
A
B
C
D
E
F
G
H
Product Portfolio[4]
Product
CYU01M16SFCU
VCC Range (V)
Min.
Typ.[4]
Max.
1.7 1.8 1.95
Speed
(ns)
70
Power Dissipation
Operating ICC (mA)
f = 1MHz
Typ.[4] Max.
f = fmax
Typ.[4] Max.
Standby ISB2 (µA)
Typ.[4] Max.
3 5 18 25 55 70
Power-up Characteristics
The initialization sequence is shown in the figure below. Chip
Select should be CE1 HIGH or CE2 LOW for at least 200 µs
after VCC has reached a stable value. No access must be
attempted during this period of 200 µs.
VCC
CE1
Stable Power
Tpu
First Access
Parameter
Description
Min.
Typ.
Max.
Unit
Tpu
Chip Enable Low After Stable VCC
200
µs
Notes:
2. Ball H6 and E3 can be used to upgrade to a 32-Mbit and a 64-Mbit density, respectively.
3. NC “no connect” - not connected internally to the die.
4.
Typical values are included for reference only and are not guaranteed
and after design changes that may affect the parameters.
or
tested.
Typical
values
are measured at
VCC =
VCC
(typ) and
TA = 25°C.
Tested
initially
Document #: 38-05603 Rev. *B
Page 2 of 12



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PRELIMINARY
CYU01M16SFCU
MoBL3™
Page Mode
This device can be operated in a page read mode. This is
accomplished by initiating a normal read of the device.
In order to operate the device in page mode, the upper order
address bits should be fixed for four-word page access
operation, all address bits except for A1 and A0 should be
fixed until the page access is completed. For an eight-word
page access, all address bits, except for A2, A1, and A0,
should be fixed. For a sixteen-word page mode all address
bits, except for A3, A2, A1, and A0, should be fixed.
The supported page lengths are four, eight, and sixteen words.
Random page read is supported for all three four, eight, and
sixteen-word page read options. Therefore, any address can
be used as the starting address.
Please refer to the table below for an overview of the page
read modes.
Page Mode Feature
Page Length
Page Read Corresponding Addresses
Page Read Start Address
Page Direction
4-Word Mode
4 words
A1, A0
Don't Care
Don't Care
8-Word Mode
8 words
A2, A1, A0
Don't Care
Don't Care
16-Word Mode
16 words
A3, A2, A1, A0
Don’t Care
Don’t Care
Document #: 38-05603 Rev. *B
Page 3 of 12



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PRELIMINARY
CYU01M16SFCU
MoBL3™
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage to Ground Potential .–0.2V to VCCMAX + 0.3V
DC Voltage Applied to Outputs
in High Z State[5, 6, 7]........................–0.2V to VCCMAX + 0.3V
DC Input Voltage[5, 6, 7].................... –0.2V to VCCMAX + 0.3V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... > 200 mA
Device
Operating
Range Temperature (TA)
CYU01M16SFCU Industrial –40°C to +85°C
VCC
1.7V to
1.95V
DC Electrical Characteristics (Over the Operating Range) [5, 6, 7]
Parameter
VCC
VOH
VOL
VIH
VIL
IIX
IOZ
ICC
ISB1
ISB2
Description
Test Conditions
Supply Voltage
Output HIGH Voltage IOH = –0.1 mA
VCC= 1.7V to 1.95V
Output LOW Voltage IOL = 0.1 mA
VCC= 1.7V to 1.95V
Input HIGH Voltage VCC= 1.7V to 1.95V
Input LOW Voltage VCC= 1.7V to 1.95V
Input Leakage
Current
GND < VIN < VCC
Output Leakage
Current
GND < VOUT < VCC
VCC Operating
Supply
Current
f = fMAX =
1/tRC
VCC= VCCmax
IOUT = 0 mA
CMOS levels
f = 1MHz
Automatic CE
Power-Down
Current — CMOS
Inputs
Automatic CE
Power-Down
Current — CMOS
Inputs
CE1 > VCC – 0.2V, CE2 < 0.2V, VIN >
VCC – 0.2V, VIN < 0.2V f = fMAX
(Address and Data Only), f = 0
(OE, WE, BHE and BLE), VCC = 3.60V
CE1 > VCC – 0.2V, CE2 < 0.2V
VIN > VCC – 0.2V or VIN < 0.2V,
f = 0, VCC=VCCMAX
CYU01M16SFCU-70 ns
Min.
Typ.[4]
Max.
1.7 1.8 1.95
VCC – 0.2
0.2
0.8 * VCC
–0.2
–1
VCC + 0.3V
0.2 * VCC
+1
–1 +1
18 25
35
55 70
55 70
Unit
V
V
V
V
V
µA
µA
mA
mA
µA
µA
Capacitance[8]
Parameter
CIN
COUT
Description
Input Capacitance
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
Max.
8
8
Unit
pF
pF
Thermal Resistance[8]
Parameter
Description
Test Conditions
ΘJA Thermal Resistance (Junction to Ambient) Test conditions follow standard test methods
ΘJC Thermal Resistance (Junction to Case)
and procedures for measuring thermal
impedence, per EIA / JESD51.
Notes:
5. VIL(MIN) = –0.5V for pulse durations less than 20 ns.
6. VIH(Max) = VCC + 0.5V for pulse durations less than 20 ns.
7. Overshoot and undershoot specifications are characterized and are not 100% tested.
8. Tested initially and after any design or process changes that may affect these parameters.
VFBGA
56
11
Unit
°C/W
°C/W
Document #: 38-05603 Rev. *B
Page 4 of 12



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