CY62177DV30 Datasheet PDF - Cypress Semiconductor

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CY62177DV30
Cypress Semiconductor

Part Number CY62177DV30
Description 32-Mbit (2M x 16) Static RAM
Page 14 Pages


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CY62177DV30 MoBL®
32-Mbit (2M x 16) Static RAM
Features
Very high speed: 55 ns
Wide voltage range: 2.20 V–3.60 V
Ultra-low active power
Typical active current: 2 mA @ f = 1 MHz
Typical active current: 15 mA @ f = fmax
Ultra low standby power
Easy memory expansion with CE1, CE2 and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed/power
Packages offered in a 48-ball fine ball grid array (FBGA)
Functional Description[1]
The CY62177DV30 is a high-performance CMOS static RAM
organized as 2M words by 16 bits. This device features
advanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life(MoBL®) in portable
Logic Block Diagram
A10
A9
A
A
A
8
7
6
A5
A4
A3
A2
A
A
1
0
DATA-IN DRIVERS
2048K × 16
RAM Array
applications such as cellular telephones.The device also has an
automatic power-down feature that significantly reduces power
consumption. The device can also be put into standby mode
when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE
are HIGH). The input/output pins (I/O0 through I/O15) are placed
in a high-impedance state when: deselected (CE1HIGH or CE2
LOW), outputs are disabled (OE HIGH), both Byte High Enable
and Byte Low Enable are disabled (BHE, BLE HIGH), or during
a write operation (CE1 LOW, CE2 HIGH and WE LOW).
Writing to the device is accomplished by taking Chip Enables
(CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If
Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0
through I/O7), is written into the location specified on the address
pins (A0 through A20). If Byte High Enable (BHE) is LOW, then
data from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A20).
Reading from the device is accomplished by taking Chip Enables
(CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW while
forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE)
is LOW, then data from the memory location specified by the
address pins will appear on I/O0 to I/O7. If Byte High Enable
(BHE) is LOW, then data from memory will appear on I/O8 to
I/O15. See the truth table for a complete description of read and
write modes.
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power-down
Circuit
BHE
WE
OE
BLE
CE2
CE1
Note
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation • 198 Champion Court
wwwD.DocautamSheenett4NUu.nmebt er : 38-05633 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 25, 2011
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CY62177DV30 MoBL®
Contents
Product Portfolio .............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 5
Data Retention Waveform................................................. 6
Switching Characteristics ................................................ 6
Switching Waveforms ...................................................... 7
Truth Table ...................................................................... 10
Ordering Information ...................................................... 10
Ordering Code Definition ........................................... 10
Package Diagram ............................................................ 11
Acronyms ........................................................................ 12
Document Conventions ................................................. 12
Units of Measure ....................................................... 12
Sales, Solutions, and Legal Information ...................... 14
Worldwide Sales and Design Support ....................... 14
Products .................................................................... 14
PSoC Solutions ......................................................... 14
Document Number : 38-05633 Rev. *E
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CY62177DV30 MoBL®
Pin Configuration[2]
Figure 1. 48-Ball FBGA Top View
12
34
56
BLE OE A0 A1 A2 CE2
I/O8 BHE A3 A4 CE1 I/O0
I/O9 I/O10 A5 A6 I/O1 I/O2
VSS I/O11 A17 A7 I/O3 Vcc
VCC I/O12 DNU A16 I/O4 Vss
I/O14 I/O13 A14 A15 I/O5 I/O6
I/O15 A19 A12 A13 WE I/O7
A18 A8 A9 A10 A11 A20
A
B
C
D
E
F
G
H
Product Portfolio
Product
CY62177DV30LL
VCC Range (V)
Min Typ[3] Max
2.2 3.0 3.6
Speed
(ns)
55
Power Dissipation
Operating ICC(mA)
f = 1 MHz
Typ[3]
Max
f = fmax
Typ[3]
Max
2 4 15 30
Standby ISB2(A)
Typ[3]
5
Max
50
Notes
2. DNU pins have to be left floating or tied to Vss to ensure proper application.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25 °C.
Document Number : 38-05633 Rev. *E
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CY62177DV30 MoBL®
Maximum Ratings
(Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.)
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature with
power applied .......................................... –55 °C to + 125 °C
Supply voltage to ground potential ...... –0.3 V to VCC + 0.3 V
DC voltage applied to outputs
in High Z state[4, 5] ............................... –0.3 V to VCC + 0.3 V
DC input voltage[4, 5]............................ –0.3 V to VCC + 0.3 V
Electrical Characteristics Over the Operating Range
Output current into outputs (LOW) .............................. 20 mA
Static discharge voltage........................................... >2001 V
(per MIL-STD-883, method 3015)
Latch-up current .....................................................>200 mA
Operating Range
Device
CY62177DV30LL
Range
Ambient
Temperature
Industrial –40 °C to +85 °C
VCC[6]
2.20 V to
3.60 V
Parameter
Description
Test Conditions
Min
Typ[7]
Max Unit
VOH
Output HIGH voltage
IOH = –0.1 mA
VCC = 2.20 V
2.0 –
–V
IOH = –1.0 mA
VCC = 2.70 V
2.4 –
–V
VOL
Output LOW voltage
IOL = 0.1 mA
VCC = 2.20 V
– – 0.4 V
IOL = 2.1mA
VCC = 2.70 V
– – 0.4 V
VIH
Input HIGH voltage
VCC = 2.2 V to 2.7 V
1.8
VCC
V
+0.3V
VCC= 2.7 V to 3.6 V
2.2
VCC
V
+0.3V
VIL
Input LOW voltage
VCC = 2.2 V to 2.7 V
VCC= 2.7 V to 3.6 V
IIX
Input leakage
GND < VI < VCC
current
–0.3 – 0.6 V
-0.3 – 0.8 V
–1 – +1 A
IOZ
Output leakage
GND < VO < VCC, output disabled
current
–1 – +1 A
ICC
VCC operating supply
f = fMAX = 1/tRC
VCC = VCCmax
current
f = 1 MHz
IOUT = 0 mA
CMOS levels
15 30 mA
2 4 mA
ISB1 Automatic CE CE1 > VCC0.2 V, CE2 < 0.2 V,
– 5 100 A
power-down
VIN > VCC–0.2 V, VIN < 0.2 V)
current—CMOS
f = fMAX (address and data only),
inputs
f = 0 (OE, WE, BHE and BLE), VCC=3.60 V
ISB2 Automatic CE CE1 > VCC 0.2 V, CE2 < 0.2 V,
power-down
VIN > VCC – 0.2 V or VIN < 0.2 V,
current—CMOS
f = 0, VCC = 3.60 V
inputs
– 5 50 A
Notes
4. VIL(min.) = –2.0 V for pulse durations less than 20 ns.
5. VIH(Max) = VCC + 0.75 V for pulse durations less than 20 ns.
6. Full Device AC operation requires linear VCC ramp from 0 to VCC(min) > 500 s.
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25 °C
Document Number : 38-05633 Rev. *E
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CY62177DV30 32-Mbit (2M x 16) Static RAM CY62177DV30
Cypress Semiconductor
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