The PIN limiter diode can be described as an incident power
controlled, RF variable resistor. When there is no large input
signal present, the impedance of the limiter diode is at its
maximum, which produces minimum insertion loss, typically
less than 0.1 dB. The presence of a large input signal
temporarily forces the impedance of the diode to a much lower
value, which produces an impedance mismatch that reflects the
majority of the input signal power back towards its source.
During the limiting process, a DC current is generated by the PIN
limiter diode. The current is not the result of rectification, but is
the result of charge carriers being forced into the I layer by the
forward alternations of the large input signal. A complete path
must be provided for this current or the diode is not capable of
limiting. Therefore, an RF choke or similar structure must be
provided to complete the path for DC current flow.
DATA SHEET • CLA4603-085LF SURFACE MOUNT LIMITER DIODE
The DC block capacitors shown in Figure 2 are optional; they
protect the limiter diode from external DC voltage that may be
present in the source or load circuits.
A cross section of the suggested printed circuit board design is
shown in Figure 3. The via shown in this view is critical, both for
electrical performance and for thermal performance. It is
recommended that several vias should be placed under the
entire footprint of the exposed paddle (pin 2) to minimize both
electrical inductance to the system ground and thermal
resistance to the system heat sink.
For more information about the operation of limiter diodes, refer
to the Skyworks Application Note, PIN Limiter Diodes in Receiver
Protectors, document number 200480.
Figure 2. Single Stage Limiter Circuit
Figure 3. Cross-Sectional View of Suggested Printed Circuit Board
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