BLF174XRS Datasheet PDF - NXP

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BLF174XRS
NXP

Part Number BLF174XRS
Description Power LDMOS transistor
Page 13 Pages


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BLF174XR; BLF174XRS
Power LDMOS transistor
Rev. 1 — 25 June 2013
Product data sheet
1. Product profile
1.1 General description
A 600 W extremely rugged LDMOS power transistor for broadcast and industrial
applications in the HF to 128 MHz band.
Table 1. Application information
Test signal
f
(MHz)
CW 108
pulsed RF
108
VDS
PL
Gp
D
(V) (W) (dB) (%)
50
600 28.5
74
50 600 29
73
1.2 Features and benefits
Easy power control
Integrated ESD protection
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (HF to 128 MHz)
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications
Broadcast transmitter applications



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NXP Semiconductors
BLF174XR; BLF174XRS
Power LDMOS transistor
2. Pinning information
Table 2. Pinning
Pin Description
BLF174XR (SOT1214A)
1 drain1
2 drain2
3 gate1
4 gate2
5 source
BLF174XRS (SOT1214B)
1 drain1
2 drain2
3 gate1
4 gate2
5 source
[1] Connected to flange.
3. Ordering information
Simplified outline Graphic symbol

1


3
[1] 4
5
2
sym117

[1]

1
3
5
4
2
sym117
Table 3. Ordering information
Type number Package
Name Description
BLF174XR -
flanged ceramic package; 2 mounting holes; 4 leads
BLF174XRS -
earless flanged ceramic package; 4 leads
Version
SOT1214A
SOT1214B
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS drain-source voltage
VGS gate-source voltage
Tstg storage temperature
Tj junction temperature
Min
-
6
65
[1] -
Max
110
+11
+150
225
Unit
V
V
C
C
[1] Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator
BLF174XR_BLF174XRS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 June 2013
© NXP B.V. 2013. All rights reserved.
2 of 13



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NXP Semiconductors
BLF174XR; BLF174XRS
Power LDMOS transistor
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter
Conditions
Rth(j-c) thermal resistance from junction to case Tj = 150 C
[1] Tj is the junction temperature.
[2] Rth(j-c) is measured under RF conditions.
6. Characteristics
Typ Unit
[1][2] 0.18 K/W
Table 6. DC characteristics
Tj = 25 C; per section unless otherwise specified.
Symbol Parameter
Conditions
Min
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 2.75 mA 110
VGS(th) gate-source threshold voltage VDS = 10 V; ID = 275 mA 1.25
IDSS drain leakage current
VGS = 0 V; VDS = 50 V -
IDSX drain cut-off current
IGSS gate leakage current
VGS = VGS(th) + 3.75 V;
VDS = 10 V
VGS = 11 V; VDS = 0 V
-
-
RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V;
ID = 9.625 A
-
Typ
-
1.7
-
38
-
0.15
Max
-
2.25
1.4
-
140
-
Unit
V
V
A
A
nA
Table 7. AC characteristics
Tj = 25 C; per section unless otherwise specified.
Symbol Parameter
Conditions
Crs feedback capacitance VGS = 0 V; VDS = 50 V; f = 1 MHz
Ciss input capacitance
VGS = 0 V; VDS = 50 V; f = 1 MHz
Coss
output capacitance
VGS = 0 V; VDS = 50 V; f = 1 MHz
Min Typ Max Unit
- 2.4 - pF
- 210 - pF
- 94 - pF
Table 8. RF characteristics
Test signal: CW; f = 108 MHz; RF performance at VDS = 50 V; IDq = 100 mA; Tcase = 25 C; unless
otherwise specified; in a class-AB production test circuit.
Symbol Parameter
Conditions
Min Typ Max Unit
Gp power gain
RLin input return loss
D drain efficiency
PL = 600 W
PL = 600 W
PL = 600 W
27.0 28.5 -
- 21 13
70 74 -
dB
dB
%
BLF174XR_BLF174XRS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 June 2013
© NXP B.V. 2013. All rights reserved.
3 of 13



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NXP Semiconductors
BLF174XR; BLF174XRS
Power LDMOS transistor

&RVV
S)

DDD



   
9'6 9
Fig 1.
VGS = 0 V; f = 1 MHz.
Output capacitance as a function of drain-source voltage; typical values per
section
7. Test information
7.1 Ruggedness in class-AB operation
The BLF174XR and BLF174XRS are capable of withstanding a load mismatch
corresponding to VSWR > 65 : 1 through all phases under the following conditions:
VDS = 50 V; IDq = 100 mA; PL = 600 W pulsed; f = 108 MHz.
7.2 Impedance information
gate 1
Zi
gate 2
Fig 2. Definition of transistor impedance
drain 1
ZL
drain 2
001aan207
Table 9. Typical push-pull impedance
Simulated Zi and ZL device impedance; impedance info at VDS = 50 V and PL = 600 W.
f Zi
ZL
(MHz)
()
()
108 4.66 j12.04
6.47 + j1.16
BLF174XR_BLF174XRS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 June 2013
© NXP B.V. 2013. All rights reserved.
4 of 13



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